satish.1979 Post subject: current collapse Posted: Thu Oct 05, 2006
3:30 am Captain Joined: Tue Oct 03, 2006 3:03 am Posts:
11 Location: India what is current collapse phenomena in tqhbt?
How can we overcome from that? Top Stephen Post
subject: Posted: Tue Oct 10, 2006 2:56 pm Captain Joined:
Wed Jun 21, 2006 8:33 pm Posts: 21 Location: Queen Creek, Arizona
satish, "Current collapse" of heterjunction bipolar transistors
is an unwanted phenomena where, as a result of temperature extremes,
current becomes unevenly distributed across different legs of a device
(usually a single leg of a multi finger device experiences second order
effects such as thermal runaway). When this happens, the total current
gain of the transistor degrades and the collector current decreases,
causing the "current collapse". There are several ways to
avoid it, some not as useful as others: 1. use a single legged
HBT (not useful, as it can still experience problems) 2. layout is
a key: proper layout can help with even temperature gradients across
the device. 3. Operate the device at lower power so that you do not
experience higher temperature that cause the "collapse". This
temperature operating threshold is very process specific, which addresses
the other point in your question: TQHBT If I am not mistaken,
TQHBT is a Heterjunction bipolar transistor manufactured by Triquint
(Google Search as I had never heard of the device). In this case, they
should provide you information on temperature operating ranges for the
device to avoid the "collapse" phenomena. To be honest I am not
entirely versed in the physics of the collapse, so I can not tell you
exactly if the mechanism is due to beta-temperature effects of say carrier
mobility effects, etc. Maybe someone else can shed light on that.
_________________ CMOS RF and Analog ESD Specialist! www.srftechnologies.com
Top satish.1979 Post subject: ThanksPosted: Wed Oct
11, 2006 8:59 am Captain Joined: Tue Oct 03, 2006 3:03
am Posts: 11 Location: India Thanks stephan for your kind
and brief reply Top Jeanalmira Post subject:
Posted: Mon Oct 30, 2006 10:37 pm General Joined:
Tue Mar 15, 2005 11:43 pm Posts: 65 Location: Singapore Hi
: How about GaN HEMT? I observed that it happens to GaN HEMT
too. I am not sure whether it's related to surface trapping? and how
this phenomenon related? Any advice is appreciated.
Thanks and Regards, Jean Top Stephen Post
subject: Posted: Thu Nov 09, 2006 6:48 pm Captain Joined:
Wed Jun 21, 2006 8:33 pm Posts: 21 Location: Queen Creek, Arizona
Jeanalmira, I think most of my previous comments still apply.
the phenomena is a temperature dependent effect and is possible among
multi-legged devices. regarding any particular technology, you need
to ask your foundry for detailed information on the conditions over
which the collapse may occur. Overall, remember it is caused by non-uniform
temperature gradients across the legs of your device. Keep temperature
low and uniform across the device, and use a very uniform layout; is
the best advice I can give without specific knowledge of the process.
_________________ CMOS RF and Analog ESD Specialist! www.srftechnologies.com
Posted 11/12/2012
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