dipak Post subject: substrate via in SiGe BiCMOS/CMOS Posted: Mon
Dec 18, 2006 8:08 am Captain Joined: Tue Nov 14, 2006
7:21 pm Posts: 9 Location: Nagpur(M.S) Are there any substrate
vias in SiGe BiCMOS/CMOS process for grounding? If not how should
we provide groundung to the layout? Top jom Post
subject: Posted: Fri Jan 26, 2007 2:43 am Captain
Joined: Fri Jan 26, 2007 2:40 am Posts: 14 Are there any
substrate vias in SiGe BiCMOS/CMOS process for grounding? I would
hope so. If not how should we provide groundung to the layout?
You can use substrate ties to provide ground to the (usually)
p- substrate and/or use I/O pins to ground the chip. Using plenty of
substrate ties can also help prevent latch-up in certain cases if high
currents are involved. jom
Posted 11/12/2012 |