 All RF Cafe Quizzes make great fodder for
employment interviews for technicians or engineers - particularly those who are
fresh out of school or are relatively new to the work world. Come to think of it,
they would make equally excellent study material for the same persons who are going
to be interviewed for a job. Bonne chance, Viel Glück, がんばろう,
buena suerte, удачи, in bocca al lupo, 행운을 빕니다,
ádh mór, בהצלחה, lykke til, 祝你好運.
Well, you know what I mean: Good luck!
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RF Cafe Quiz #49
1. Why are S-parameters preferred for high frequency network
analysis?
b) Open and short circuit terminations are not required
True open and short circuit terminations, which are required for Y-, Z-, h-,
and G-parameters, are difficult to achieve at high frequencies, but S-parameters
use easily produced impedance values such as the standard 50 Ω and 75 Ω.
(see page 82)
2. To what temperature is noise figure normally referenced?
d) 290 K
Friis suggested that the noise figure (factor) be defined wrt a reference temperature
of 290 K. (see page 107)
3. Where does the Quantum Confinement (QC) effect occur
in a MOSFET?
b) At the gate
QC occurs in the quasi-triangular potential well formed in the inversion layer
at the channel-gate dielectric interface. (see page 176)
4. Why is substrate resistance important?
d) It degrades fMAX and FMIN
The substrate resistance is important in high-frequency and high-speed applications
because it degrades fMAX and FMIN. (see page 191)
5. At what rate has MOSFET gate shrink scaling factor
(√2) occurred since the 1970s?
b) Every 2-3 years
Ever since the first commercial LSI CMOS circuits appeared in the early 1970s,
the minimum feature size ofCMOS technology, usually represented by the physical
gate length of the MOSFET, has shrunk by a factor S = √2 every 2-3 years.
(see page 209)
6. Who developed the first High Electron Mobility Transistor
(HEMT)?
c) Fujitsu (Japan)
The first HEMT was fabricated by Fujitsu, in Japan, in 1980. (see page
254)
7. When is coplanar waveguide (CPW) more desirable than
microstrip on a semiconductor substrate?
c) When a ground plane located on the top of the IC is not feasible.
In situations where a ground plane on top of the semiconductor wafer is not feasible
or has high loss, CPW can have (significantly) lower loss than microstrip
lines realized directly over the silicon substrate. (see page 301)
8. What is the definition of Power Added Efficiency (PAE)
of a power amplifier?
d) (POUT - PIN) / PDC
PAE is the ratio of the difference in input and output signal power and the DC
supply input power. (see page 375)
9. What is the best type of biasing for an Low Noise Amplifier
(LNA) at high temperature?
d) Complimentary to Absolute Temperature (CTAT) current mirror bias
Peak gain current density does not change with temperature; therefore, PTAT is
not very effective whereas CTAT should be used. (see page 488)
10. How are in-phase (I) and quadrature (Q) components
of an RF signal generated?
a) With a 90° (hybrid quadrature) equal amplitude power coupler
The hybrid quadrature coupler uses an effective 1/4-wavelength additional length
in one signal path (usually 3 dB down = equal amplitude split) to create I
(0°) and Q (90°) output signal ports. (see page 608)
Posted October 17, 2019
(original 5/23/2013)
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