ASIC & FPGA Design

ASIC Manufacturers & Services

ASIC Design Books

Achieving Design Security Requirements Using eASIC’s Technology

White Paper from eASIC Corp.

Achieving DFT Closure

From Synopsys, Inc.

The Art of Successful ASIC Design

From Opencores.org by John Bedford Solomon.

ASIC Design at Home

From Journal of Universal Computer Science, Heinrichmeyer Friedrich.

ASIC Design Channel

ASIC design articles, product information and vendors from Power Design 365.

ASIC Design Guidelines

Application note from Atmel Corporation.

ASIC Design Practices

Application note from Flextronics Semiconductor.

ASIC Design Tips

A mix of useful tips from Doulos Ltd.

ASIC Design Methodology Primer

Abstract from IBM.

ASICs... the Website

A project in computer-assisted education for integrated-circuit design.

ASIC-Style Design Techniques for Programmable Devices

By Salil Raje Hier Design.

ASIC to FPGA Design Methodology & Guidelines

From Altera Corporation.

Creating a Timing Constraint File for RTL Synthesis Using the Synplify ASIC® Tool

Application note from Synplicity, Inc.

Design Guidelines for Optimal Results in FPGAs

By Jennifer Stephenson, Altera Corporation.

Designing IC’s for USB 2.0 and Other High Speed Communications

Abstract by David J Willis, SliceX, Inc.

Design your own ASIC

From Advanced Packaging, by By Donald Hawk and Kevin Kolwicz.

Development of ASIC Chip-Set for High-End Network Processing Application-A Case Study

By Sanjeev Patel, Wipro Technologies.

Embedding the 1-Wire Master

Application note from Maxim Integrated Products.

Floorplanning Application Note

Oki Floorplanner Software user guideline.

FPGA to Structured ASIC Migration

Application note from ChipX, Inc.

Mixed Signal ASIC Design Methodology for Space Applications

By L. Foglia.

Navigating the Silicon Jungle: FPGA or ASIC?

From Chip Design, by John Blyler.

Spec-Based Verification

White paper from Verisity Ltd.

PAR5780 SCSI Expander ASIC Design Considerations

From Paralan Corporation.

SOI Eases Radiation-Hardened ASIC Designs

From EE Times, by Thomas Romanko and Brian Clegg.

Translation Of Existing ASIC Designs

From Atmel.

Xilinx Design Reuse Methodology for ASIC and FPGA Designers

System-on-a-Chip Designs Reuse Solutions from Xilinx.