Module 13  Introduction to Number Systems and Logic
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CHAPTER 3 SPECIAL LOGIC CIRCUITS LEARNING OBJECTIVES Upon completion of this chapter, you should be able to do the following: 1. Recognize the types of special logic circuits used in digital equipment. 2. Identify exclusive OR and exclusive NOR circuits and interpret their respective Truth Tables. 3. Identify adder and subtracter circuits. 4. Identify the types of flipflops used in digital equipment and their uses. 5. Identify counters, registers, and clock circuits. 6. Describe the elements that make up logic families  RTL, DTL, TTL, CMOS. INTRODUCTION Figure 31 is a portion of a typical logic diagram. It is similar to the diagrams you will encounter as your study of digital circuitry progresses. 31
Figure 31.  Typical logic diagram. Look closely at the figure. You will see many familiar logic gates. You will also see several that you may not recognize. 32
Digital equipment must be capable of many more operations than those described in chapter 2. Provisions must be made for accepting information; performing arithmetic or logic operations; and transferring, storing, and outputting information. Timing circuits are included to ensure that all operations occur at the proper time. In this chapter you will become acquainted with the logic circuits used to perform the operations mentioned above. THE EXCLUSIVE OR GATE The exclusive OR gate is a modified OR gate that produces a HIGH output when only one of the inputs is HIGH. You will often see the abbreviation XOR used to identify this gate. When both inputs are HIGH or when both inputs are LOW, the output is LOW. The standard symbol for an exclusive OR gate is shown in figure 32 along with the associated Truth Table. The operation function sign for the exclusive OR gate is ⊕ Figure 32.  Exclusive OR gate and Truth Table. If you were to observe the input and output signals of an XOR gate, the results would be similar to those shown in figure 33. At T_{0}, both inputs are LOW and the output is LOW. At T_{1}, A goes to HIGH and remains HIGH until T_{2}. During this time the output is HIGH. At T_{3}, B goes HIGH and remains HIGH through T_{5}. At T_{4}, A again goes HIGH and remains HIGH through T_{5}. Between T_{3}and T_{4} , the output is HIGH. At T_{4}, when both A and B are HIGH, the output goes LOW. 33
Figure 33.  Exclusive OR gate timing diagram. THE EXCLUSIVE NOR GATE The exclusive NOR (XNOR) gate is nothing more than an XOR gate with an inverted output. It produces a HIGH output when the inputs are either all HIGH or all LOW. The standard symbol and the Truth Table are shown in figure 34. The operation function sign is ⊕with a vinculum over the entire expression. Figure 34.  Exclusive NOR gate and Truth Table. A timing diagram for the XNOR gate is shown in figure 35. You can see that from T_{0} to T_{1}, when both inputs are LOW, the output is HIGH. The output goes LOW when the inputs are opposite; one HIGH and the other LOW. At time T_{3}, both inputs go HIGH causing the output to go HIGH. 34
Figure 35.  Exclusive NOR gate timing diagram. Q1. What is the sign of operation for the XOR gate? Q2. What will be the output of an XOR gate when both inputs are HIGH? Q3. A twoinput XOR gate will produce a HIGH output when the inputs are at what logic levels? Q4. What type of gate is represented by the output Boolean expression ? Q5. What will be the output of an XNOR gate when both inputs are LOW? ADDERS Adders are combinations of logic gates that combine binary values to obtain a sum. They are classified according to their ability to accept and combine the digits. In this section we will discuss quarter adders, half adders, and full adders. QUARTER ADDER A quarter adder is a circuit that can add two binary digits but will not produce a carry. This circuit will produce the following results: 0 plus 0 = 0 0 plus 1 = 1 1 plus 0 = 1 1 plus 1 = 0 (no carry) 35
You will notice that the output produced is the same as the output for the Truth Table of an XOR. Therefore, an XOR gate can be used as a quarter adder. The combination of gates in figure 36 will also produce the desired results. When A and B are both LOW (0), the output of each AND gate is LOW (0); therefore, the output of the OR gate is LOW (0). When A is HIGH and B is LOW, then B is HIGH and AND gate 1 produces a HIGH output, resulting in a sum of 1 at gate 3. With A LOW and B HIGH, gate 2 output is HIGH, and the sum is 1. When both A and B are HIGH, neither AND gate has an output, and the output of gate 3 is LOW (0); no carry is produced. Figure 36.  Quarter adder. HALF ADDER A half adder is designed to combine two binary digits and produce a carry. Figure 37 shows two ways of constructing a half adder. An AND gate is added in parallel to the quarter adder to generate the carry. The SUM column of the Truth Table represents the output of the quarter adder, and the CARRY column represents the output of the AND gate. Figure 37.  Half adders and Truth Table. 36
We have seen that the output of the quarter adder is HIGH when either input, but not both, is HIGH. It is only when both inputs are HIGH that the AND gate is activated and a carry is produced. The largest sum that can be obtained from a half adder is 10_{2} (1_{2} plus 1_{2}). FULL ADDER The full adder becomes necessary when a carry input must be added to the two binary digits to obtain the correct sum. A half adder has no input for carries from previous circuits. One method of constructing a full adder is to use two half adders and an OR gate as shown in figure 38. The inputs A and B are applied to gates 1 and 2. These make up one half adder. The sum output of this half adder and the carryfrom a previous circuit become the inputs to the second half adder. The carry from each half adder is applied to gate 5 to produce the carryout for the circuit. Figure 38.  Full adder and Truth Table. Now let's add a series of numbers and see how the circuit operates. First, let's add 1 and 0. When either A or B is HIGH, gate 1 has an output. This output is applied to gates 3 and 4. Since the carryin is 0, only gate 3 will produce an output. The sum of 1_{2} and 0 is 1_{2}. Now let's add 12 and 12. If A and B are both HIGH, the output of gate 1 is LOW. When the carryin is 0 (LOW), the output of gate 3 is LOW. Gate 2 produces an output that is applied to gate 5, which produces the carryout. The sum of 1_{2} and 1_{2} is 10_{2}, just as it was for the half adder. When A and B are both LOW and the carryin is 1, only gate 3 has an output and produces a sum of 12 with no carryout. Now, let's add A or B and a carryin. For example, let's assume that A is HIGH and B is LOW. With these conditions, gate 1 will have an output. This output and the carryin applied to gates 3 and 4 will produce a sum out of 0 and a carry of 1. This carry from gate 4 will cause gate 5 to produce a carryout. The sum of A and a carry (1_{2} plus 1_{2}) is 10_{2}. 37
When A, B, and the carryin are all HIGH, a sum of 1 and a carryout are produced. First, consider A and B. When both are HIGH, the output of gate 1 is LOW, and the output of gate 2 is HIGH, giving us a carryout at gate 5. The carryin produces a 1 output at gate 3, giving us a sum of 1. The output of the full adder is 11_{2}. The sum of 1_{2} plus 1_{2} plus 1_{2} is 11_{2}. PARALLEL ADDERS The adders discussed in the previous section have been limited to adding singledigit binary numbers and carries. The largest sum that can be obtained using a full adder is 11_{2}. Parallel adders let us add multipledigit numbers. If we place full adders in parallel, we can add two or fourdigit numbers or any other size desired. Figure 39 uses STANDARD SYMBOLS to show a parallel adder capable of adding two, twodigit binary numbers. In previous discussions we have depicted circuits with individual logic gates shown. Standard symbols (blocks) allow us to analyze circuits with inputs and outputs only. One standard symbol may actually contain many and various types of gates and circuits. The addend would be input on the A inputs (A_{2} = MSD, A_{1} = LSD), and the augend input on the B inputs (B_{2} = MSD, B_{1} = LSD). For this explanation we will assume there is no input to C_{0} (carry from a previous circuit). Figure 39.  Parallel binary adder. Now let's add some twodigit numbers. To add 10_{2} (addend) and 01_{2} (augend), assume there are numbers at the appropriate inputs. The addend inputs will be 1 on A_{2} and 0 on A_{1}. The augend inputs will be 0 on B_{2} and 1 on B_{1}. Working from right to left, as we do in normal addition, let's calculate the outputs of each full adder. With A_{1} at 0 and B_{1} at 1, the output of adder 1 will be a sum (S_{1}) of 1 with no carry (C_{1}). Since A_{2} is 1 and B_{2} is 0, we have a sum (S_{2}) of 1 with no carry (C_{2}) from adder 1. To determine the sum, read the outputs (C_{2}, S_{2}, and S_{1}) from left to right. In this case, C_{2} = 0, S_{2} = 1, and S_{1} = 1. The sum, then, of 10_{2} and 01_{2} is 011_{2} or 11_{2}. To add 11_{2} and 01_{2}, assume one number is applied to A_{1} and A_{2}, and the other to B_{1} and B_{2}, as shown in figure 310. Adder 1 produces a sum (S_{1}) of 0 and a carry (C_{1}) of 1. Adder 2 gives us a sum (S2) 38
of 0 and a carry (C_{2}) of 1. By reading the outputs (C_{2}, S_{2}, and S_{1}), we see that the sum of 11_{2} and 01_{2} is 100_{2}. Figure 310.  Parallel addition. As you know, the highest binary number with two digits is 11_{2}. Using the parallel adder, let's add 11_{2} and 11_{2}. First, apply the addend and augend to the A and B inputs. Calculate the output of each full adder beginning with full adder 1. With A_{1} and B_{1} at 1, S_{1} is 0 and C_{1} is 1. Since all three inputs (A_{2}, B_{2}, and C_{1}) to full adder 2 are 1, the output will be 1 at S_{2} and 1 at C_{2}. The output of the circuit, as you read left to right, is 110_{2}, the sum of 11_{2} and 11_{2}. Parallel adders may be expanded by combining more full adders to accommodate the number of digits in the numbers to be added. There must be one full adder for each digit. Q6. What advantage does a half adder have over a quarter adder? Q7. An XOR gate may be used as what type of adder? Q8. What will be the output of a half adder when both inputs are 1s? Q9. What type of adder is used to handle a carry from a previous circuit? Q10. How many full adders are required to add fourdigit numbers? Q11. With the inputs shown below, what will be the output of S_{1}, S_{2}, and C_{2}? 39
Q12. What is the output of C1? SUBTRACTION Subtraction is accomplished in computers by the R's complement and add method. This is the same method you used in chapter 1 to subtract binary numbers. R's complement subtraction allows us to use fewer circuits than would be required for separate add and subtract functions. Adding XOR gates to full adders, as shown in figure 311, enables the circuit to perform R's complement subtraction as well as addition. Figure 311.  R's complement adder/subtracter. To add two numbers using this circuit, the addend and augend are applied to the A and B inputs. The B inputs are applied to one input of the XOR gates. A control signal is applied to the other input of the XOR gates. When the control signal is LOW, the circuit will add; and when it is HIGH, the circuit will subtract. In the add mode, the outputs of the XOR gates will be the same as the B inputs. Addition takes place in the same manner as described in parallel addition. Before we attempt to show subtraction, let's review R's complement subtraction. To subtract 10_{2} from 11_{2}, write down the minuend (11_{2}). Perform the R's complement on the subtrahend. Now add the minuend and the complemented subtrahend. Disregard the most significant 1, and the difference between 11_{2} and 10_{2} is 01_{2}. The most significant 1 will not be used in the example shown in the following paragraph. 310
NEETS Table of Contents
 Introduction to Matter, Energy,
and Direct Current
 Introduction to Alternating Current and Transformers
 Introduction to Circuit Protection,
Control, and Measurement
 Introduction to Electrical Conductors, Wiring
Techniques, and Schematic Reading
 Introduction to Generators and Motors
 Introduction to Electronic Emission, Tubes,
and Power Supplies
 Introduction to SolidState Devices and
Power Supplies
 Introduction to Amplifiers
 Introduction to WaveGeneration and WaveShaping
Circuits
 Introduction to Wave Propagation, Transmission
Lines, and Antennas
 Microwave Principles
 Modulation Principles
 Introduction to Number Systems and Logic Circuits
 Introduction to Microelectronics
 Principles of Synchros, Servos, and Gyros
 Introduction to Test Equipment
 RadioFrequency Communications Principles
 Radar Principles
 The Technician's Handbook, Master Glossary
 Test Methods and Practices
 Introduction to Digital Computers
 Magnetic Recording
 Introduction to Fiber Optics
