October 1969 Electronics World
Table of Contents
Wax nostalgic about and learn from the history of early electronics. See articles
Electronics World, published May 1959
- December 1971. All copyrights hereby acknowledged.
You will probably chuckle at the sight of the printed circuit board being an example used in an article about high density PCB production. However, in 1969 it was heralded as leading edge technology. Remember, though, that surface mount components the size of a grain of salt were unheard of so such a board probably represents a bunch of leaded components being closely packed together with the biggest concern for density being heating / cooling issues. Part of the big deal with this board, when you read the article, is that it is one of eight that were produced on the same substrate and then singulated afterward. As mentioned often, this was the era of transition from vacuum tube chassis with point-to-point wiring to solid state and printed circuit boards.
The October 1969 issue of Electronics World ran a series of articles on the newfangled science of printed circuit boards. See the table of contents for the rest.
High-Density PC Boards
The author joined the company in 1960 with a sales engineering background in commercial refrigeration. He studied at NYU and Hartford Institute of Accounting.
By Hal R. Roffman, Jr.
Executive Vice-President, The Sibley Company
Smaller components and more complex equipment have led to higher density and multilayer boards. Here is how the user can help to alleviate some of the manufacturing problems and reduce his costs.
High-density electronic packaging has caused severe problems for the printed-circuit manufacturing industry. Smaller conductor lines, tighter spacing, stringent hole locations, relationship of hole size to pad size, and plating requirements specified to satisfy a variety of soldering techniques all add up to process and production difficulties in determining manufacturing yields and in predetermining costs.
What is meant by a high-density printed circuit? Actually the amount of circuitry on a printed circuit has little to do with the number of processes involved. A circuit with two holes and one conductor line will travel the same route in process as its more complicated brother. A circuit with many terminal areas and conductor lines will only require more time in hole drilling, retouching, and inspection. All of the other processes remain the same.
Although the number of processes is the same, the most significant difference between the simple and the dense printed circuit is the size of the multiple-image panel which can be used. A variety of factors dictate the feasible size of a panel for manufacturing purposes. Obviously, it would be prohibitively expensive to manufacture a circuit of reasonable size one at a time. The usual technique, therefore, is to step-and-repeat the image photographically and to apply as many processes as possible to the panel or "flat" containing a number of circuits which are separated later in the fabrication process.
Fig. 1 - Example of circuit requiring only three hole sizes.
Fig. 1 shows a plated-through hole circuit which can be manufactured in a panel containing eight circuits. The following characteristics had to be analyzed in order to determine if an "8-up panel" would be feasible.
1. Physical size of the panel: It must be compatible with all plant equipment, such as tanks, drilling equipment, and screens.
2. Relationship of holes to circuitry pattern: The holes in this circuit, as related to their surrounding terminal area, will yield a nominal 0.020" of metal remaining between the edge of the hole and the edge of the terminal area. The specification for minimum annular ring tells us we must have 0.010" minimum metal remaining after all processing. This results in an over-all tolerance of 0.010" which will permit the pattern to be applied by the screening process over the total distance of the 8-up panel. The tolerance used up in screening can be as much as 0.005", which leaves us an additional 0.005" for other processes.
3. Plating specifications: Plating thicknesses must be in the normal range: Copper, 0.001" to 0.002"; nickel, 0.0002" to 0.00005": gold, 0.00005" to 0.0001"; or solder, 0.0003" to 0.001". If plating thicknesses are specified beyond these ranges, too large a panel may develop high-current density areas which can result in unequal amounts of electroplate being deposited over the entire area.
4. Hole sizes and tolerance: If a wide range of hole sizes is specified, too large a panel will cause difficulty in plating down to the desired diameters. The circuit in Fig. 1 requires only 3 sizes, the smallest being 0.030". It must be remembered that the final diameter of a plated-through hole is created by electroplating. Therefore, the drilled size has to be substantially larger than the specified finished hole diameter.
5. Order requirements: Two factors which are often overlooked by both the customer and the manufacturer are time and money as related to manufacturing feasibility. Tighter-than-normal tolerances can easily be met (a) when the requirement involves only a small number of circuits (1 to 25 pieces), (b) when the economics of the procurement permit high cost per unit ($25 to $50 each for a circuit which, in large quantity would cost $8-$10), and (c) when sufficient time is available for careful tooling and processing by the manufacturer.
In view of the many assessments necessary to successful compliance with high-density specifications, it becomes mandatory for close communication with potential suppliers. This line of communication must be opened very early in order to avoid designing into a potential trap. Design criteria and specification writing should be done in consultation with the printed-circuit supplier or suppliers. Time-consuming or not, this policy can preclude the possibility of expensive or even impossible criteria creeping into specifications and on to blueprints.
High-density printed circuits can best be defined by listing their characteristics. Anyone of these items prevalent in either the design or its related specification will place the circuit in the high-density category.
1. Conductor widths (at 1:1) of less than 0.010".
2. Spacing between conductors or terminal areas (at 1:1) of less than 0.010".
3. Dimensional hole locations, expressed either in true position or a linear dimension equivalent to ±0.003".
4. Integrated-circuit hole patterns, with or without conductor lines passing between the holes.
5. Plated-through hole diameter tolerances less than ±0.005".
1. Front-to-hack registration of less than ±0.005".
2. Annular ring requirement allowing less than ±0.010" from the nominal. Example: Pad (terminal area) diameter at 1:1 is 0.062". Finished-hole diameter is nominally 0.040". Annular ring (amount of metal remaining between edge of hole and edge of pad) specified is 0.005". Nominal annular ring is 0.011", leaving permissible mis-registration of hole and surrounding pattern of only ±0.006".
3. Spacing or conductor dimension tolerances less than ±0.002".
The most significant factor in all of the criteria related to distinguishing between a high-density printed circuit and a "normal" printed circuit is the relationship of the plated-through hole to its surrounding terminal area. This becomes the focal point for a multitude of accumulated tolerances. The designer's first consideration should be "functional acceptance." In consultation with his quality-assurance engineers, it must be decided exactly what will constitute a reliable solder connection at the terminal area for the desired end result. For example, it is obviously not the prerogative of the printed-circuit manufacturer to determine whether a minimum annular ring of 0.003" will yield a solder connection substantial enough for the environmental conditions of the end equipment. In some applications, the plated-through hole can drift all the way to the very edge of the terminal area without causing any detrimental effects to the integrity of the device, while in other equipment it may be mandatory to leave no less than 0.010" of metal remaining at any point in the 360 degrees of the terminal area. Although a determination of solder-joint reliability is difficult, it is of extreme importance in order to avoid over-specifying, or imposing impossible tolerance restrictions on the manufacturer.
The following factors are involved in the accumulation of annular ring tolerances:
1. Artwork Preparation: The tolerances start to disappear even at 4:1. Commercially available tapes and terminal areas (pads) have a tolerance. A pad which, at 1:1, should be nominally 0.062", at 4:1 can be as much as 0.002" out of dimension. Before it is even laid down on the Mylar, a potential 1:1 dimension of 0.000.5" can be missing. The method by which the pads are applied to the Mylar master is of extreme importance. Laying pads down by hand on a grid can use up as much as 0.10" at 4:1, with a resulting 0.0025" disappearing at 1:1.
2. Hole Drilling: Many different types of equipment are used in the industry for drilling printed circuits. The most accurate drilling can be achieved with numerically controlled tape equipment. Although some of the equipment manufacturers advertise repeatable tolerances of 0.0005" to 0.001", in actuality the printed-circuit manufacturer is achieving 0.0015" to 0.002" and, in some cases where equipment is not properly maintained, even greater variances. Production quantities also involve stacking of panels during the drilling operation. If this is not done judiciously, drill wandering will further compound hole drift.
3. Pattern Delineation: The least expensive method of applying a printed-circuit pattern is by screening. Further cost benefits are realized due to the fact that screening inks will withstand plating cycles more reliably than other direct photo-printing methods. There is less breakdown of the plating resist and, therefore, less subsequent operations for removal of unwanted plating. With a carefully controlled screening operation, many high-density patterns are "screenable." Depending upon the size of the multiple-image panel, however, there is enough movement of the screen during the operation to cause pattern shift up to 0.005". Here, again, the terminal area is moving in its relationship to the pre-drilled hole.
4. Plating: Plating build-ups can change the terminal area dimension significantly. Therefore, allowances must be incorporated in the master artwork commensurate with the plating specifications. Where tight spacing and tight conductor width tolerances are specified, the master artwork may have to be drawn on the low side, on the nominal, or on the high side of the tolerances depending upon the metals to be plated, their respective thicknesses, and their sequence.
5. Etching: The thickness of the copper foil on the base material will have its effect on the end dimensions. The least effect on the artwork dimensions is achieved by using 0.0014" (one-ounce) copper foil and then pattern plating the rest of the required copper. This leaves a minimum amount of unwanted copper under the plating resist, and etching can be achieved with less undercut and a minimum effect on the pattern dimensions.
A tolerance study of the foregoing steps in creating a printed circuit reveals some disturbing facts. When the manufacturer receives the master artwork he stands a good chance of having lost 0.0025" of tolerance before the photographic reduction. Assuming that the reduction is extremely accurate, he then proceeds to manufacture faced with the certainty that he will lose another accumulation of at least 0.007" just between hole drilling and screening. If the plating and etching processes cancel each other out dimensionally, he will reach the end of the road having used up a total of 0.0095". Thus, if a terminal area is laid out at 0.062" and is to contain a 0.040" hole with an annular ring specification of 0.005", the only additional remaining tolerance for the manufacturer is 0.0015". Although this is a "worst-condition" analysis, it points up the critical aspects of high-density circuit design as related to the allocation of necessary tolerances for manufacturing feasibility.
When high-density packaging imposes designs and specifications which approach optimum manufacturing capabilities, consideration must be given to expanding the design to multilayer boards. Relief in conductor-line proximities and hole size to pad size relationships can be accomplished by using the multilayer technique. It is often more economically feasible to design a more expensive multilayer printed circuit than to attempt to achieve the same functions on a two-sided, extremely dense printed circuit.
Posted December 12, 2017