April 1973 Popular Electronics
Table of Contents
Wax nostalgic about and learn from the history of early electronics. See articles
published October 1954 - April 1985. All copyrights are hereby acknowledged.
Adolph Mangieri, who authored
articles in electronic magazines in the 1970s and 1980s, provided a good introduction to
junction field effect transistors (JFETs) in this 1973 piece in Popular Electronics.
As mentioned, JFETs were a relative newcomer at the time to the commercial electronics
world because of high fabrication costs. Obtaining consistent pinchoff voltages and gains
was largely responsible for the costs. Semiconductor processing and some circuit
application examples are included. One of the first big commercial applications of the
JFET was probably transistorized multimeters in order to obtain a high input impedance.
Acting like a vacuum tube, the versatile JFET has many applications
By Adolph A. Mangieri
Junction field effect transistors (JFETs) are now available
in quantities and prices comparable to those of the bipolar transistor. Although the JFET
was developed at about the same time as the bipolar, its appearance on the market was delayed
because of the high cost of production, which has now been greatly reduced by advances in
manufacturing technology - including the planar process.
The JFET has a transverse conductive channel whose cross section is varied by application
of an electric field perpendicular to the current path. The field is applied by gate junctions.
The controlled load current consists either of electrons or holes (but not both) and it passes
through only one type of semiconductor material - hence, the term unipolar transistor.
Fig. 1 - A bar junction FET is shown at (A), a planar junction FET at (B).
At (C), channel height is reduced by increase of depletion zone height. Channel is cut off
(D) by merged depletion zones. At (E) is shown onset of saturation region with the drain voltage
equal to pinch-off voltage. With high drain voltage, the saturation current remains constant
Fig. 2 - Static characteristics of the JFET showing the linear, or triode,
region and the saturation, or pentode, region of the vacuum tube.
Types of construction of the JFET include the n-channel bar (Fig. 1A) and the economically
fabricated planar double-diffused unit formed on one side of the silicon substrate as shown
in Fig. 1B. Gate regions are heavily doped p regions and channels are lightly doped n regions.
This provides considerable "leverage" of control of the depletion zone by relatively small
Channel ends are terminated by source and drain connections by metalized ohmic contacts
(linear, non-rectifying). Source and drain leads are interchangeable in symmetrical JFET's;
and, although the gate leads are usually tied together, they may be separated to form a dual-gate
Figure 1A shows the normal voltage polarities and depletion zones (shaded) for an n-channel
JFET. Consider first the effect of varying gate voltage alone at low drain-source voltage.
At zero gate voltage, channel height is maximum, and channel resistance is minimum. At an
intermediate gate voltage (Fig. 1C) channel height is reduced by penetration of the depletion
zone. Channel resistance is higher because the depletion zone is much like a non-conductive
insulator. Finally, at a particular gate voltage, usually between one and eight volts, the
depletion zones merge, cutting off the current (Fig. 1D). This occurs at gate pinch-off voltage
Now, consider the effect of varying the drain voltage with zero gate voltage. As shown
in Fig. 2, drain current increases with increasing drain voltage until VDS equals
VP. Channel saturation commences at this point and the depletion zones merge initially
at point A in Fig. 1E. With further increase in drain voltage, the drain current remains constant
in the saturation region. Depletion zone merging progresses toward the source, as shown at
point B in Fig. 1F. At sufficiently high drain voltage, the gate junction avalanches in the
Although zone merging is shown in Figs. 1E and 1F, current continues to flow by virtue
of carrier injection at points A and B, effected by high current concentration and electric
fields at these points. In the saturation region, the JFET is a constant-current source with
gate voltage control.
At a lower gate voltage (V1 in Fig. 2) saturation occurs at a lower drain voltage
which is equal to VP-V1 at a lower drain current. Finally, at VP,
the JFET is cut off for all values of drain voltage. The linear region may be termed the triode
region and the saturation region the pentode region by analogy to vacuum tube characteristics.
Applications. Frequently used as a low-level preamplifier in the common-source
connection (Fig. 3A), the JFET permits direct inputs from a high impedance device such as
a crystal microphone. Source resistor RS provides gate bias and also negative feedback
which linearizes the input-output characteristics at the expense of voltage gain. For higher
ac gain, a capacitor can be connected across the resistor.
Fig. 3 - Common-source voltage amplifier (A) has high input and output
impedances, with voltage and power gain. Source follower (B) has high input impedance and
low output impedance, with power gain but less than unity on voltage gain. FET can be used
as a constant current source (C) and source follower and a constant-current supply combined
provide near unity gain (D). At (E), FET-bipolar combination boosts voltage and the power
rating of FET.
The source follower, Fig. 3B, is another common application. Output voltage is across the
source resistor. Operationally, the output voltage follows the input but at less than unity
gain. In addition, the output impedance is less than the source resistance. This circuit is
used to step down impedance levels while preserving bandwidth and linearity. For example,
a high-impedance device can be coupled to a low-impedance coaxial cable without sacrificing
frequency response. The circuit can be used to step up the input impedance of the bipolar
transistor. In effect, the source follower is an impedance transformer with power gain.
Linear sawtooth generators and long-delay timers may use the JFET in a circuit which is
equivalent to a constant-current diode (Fig. 3C). Current can be adjusted from loss with the
source resistor set to zero and to fractions of a microampere with large values of RS.
The circuit operates in the saturation region where drain voltage changes have little effect
on drain current.
To obtain a voltage gain near unity, the source resistor must be large in value. This requires
higher supply voltages. By replacing the source resistor with a constant-current source (Fig.
3D), a high equivalent source resistor is achieved with a lower dc drop across the current
Present limitations on JFET voltage and power are circumvented by the FET-bipolar cascode
circuit shown in Fig. 3E. The drain voltage of Q1, which drives Q2, is about equal to the
battery voltage. By using a high-voltage transistor for Q2, ,VC can be much larger
than VD, permitting large RL values and much higher output voltage and
power. Cascode circuits inherently have low reverse feedback or coupling. As such, the circuit
is particularly suited to high-frequency tuned amplifiers since it eliminates the need for
neutralization to prevent oscillations.
Transistorized voltmeters sometimes use a JFET to provide high input impedances (11 megohms
or more) with sensitivities exceeding those of a VTVM. Figure 4A shows the simplest FET voltmeter
circuit, a dc bridge with the FET in one leg. The source resistor provides negative feedback
to give high linearity in the response. The circuit requires a regulated supply voltage -
easily obtained by using a zener diode - and can be used with full-scale dc ranges as low
as 200 millivolts.
Higher dc sensitivities are obtained in the differential amplifier dc voltmeter circuit
shown in Fig. 4B. The circuit also has high common-mode rejection. Emitter-follower, constant-current
source Q3 fixes the drain currents to the zero drift points (or near them) and also reduces
effects of supply voltage changes. The source resistors improve stability and linearity. For
optimum results, Q1 and Q2 must be closely matched pairs.
Fig. 4 - Basic dc FET voltmeter (A) uses a source follower as part of bridge
to give high stability, linearity, and sensitivity. A dc voltmeter using a FET differential
and constant-current source is shown at (B). Chopper (C) has low noise and offset.
The JFET chopper circuit shown in Fig. 4C, when operated with sources having high impedance
and amplifiers with high input impedance, is better than a bipolar transistor chopper. A chopper
converts low-level dc to low-level ac, which is more readily amplified. The JFET chopper has
an offset voltage near zero. The gates of Q1 and Q2 are driven by square waves 180 degrees
out of phase so that one transistor is on while the other is off. Transistor Q2 reduces noise
by shorting the amplifier input when Q1 is off or open. Chopper transistors are designed for
low on resistance in the linear region. (The on resistance may vary from a low of 10 ohms
for low-speed choppers to 150 ohms for higher speeds.)
Other JFET applications include their use in mixers or converters, in which advantage is
taken of their nonlinear characteristics. Dual-gate or tetrode JFET's are used in agc and
other dual-input circuits. Digital circuit logic elements have high fan-out and low power
requirements as a result of high input impedances. The relatively high gate voltage swings
which change the state from on to off, provide high noise immunity in FET logic elements.
The switching speed is inversely related to the operating drain current; but, within the same
current range, the switching speed of JFET logic is somewhat comparable to many junction transistors.
Posted October 9, 2017