OBJECTIVE:

To obtain a Full-time position in Mixed-Signal/RF system development involving testing, validation or design

EDUCATION:

University of Florida, Gainesville, FL

MS, Electrical and Computer Engineering                        Graduation: 08/2008       GPA: 3.7           Availability: 9/2008

Anna University, Chennai, India

BE, Electronics and Communication Engineering  Graduation: 05/2006       GPA: 3.7          

RELEVANT COURSES:

Bipolar Analog IC Design, MOS IC Design, VLSI Circuits and Technology, Advanced VLSI Design, RF Circuits and Systems, Microwave IC Design, Large Signal RFIC, Antenna Systems, Reconfigurable Computing, Computer Architecture.

EXPERIENCE:

Teaching Assistant:         Electronic Circuits I                                                                               (Spring 2008)

Grade Assistant:             Bipolar Analog IC Design                                                                       (Fall 2007)       

Member:                      CHREC-NSF Center for High Performance Reconfigurable Computing          (Summer 2007)  

SKILLS:

Scripting: PERL                                                           CAD: Cadence ICFB: Spectre, Virtuoso, Diva, PSpice

EDA: Agilent ADS, Ansoft Designer, SysCalc                  HDL: VHDL

High level languages: C, Matlab                                                 HDL tools: ActiveHDL, XilinxISE                     

Assembly languages: MIPS-32                                       Equipment: NI ELVIS, Tektronix TDS2024

PROJECTS:

Digital Integrated Circuits:

• Power Gated and Dual Threshold Low Power SRAM: Design and layout of a 256 bit low power SRAM using Sleepy Transistors to minimize the leakage power at sub-threshold levels.

• Dual Supply Voltage Carry Propagate Adder (CPA): Design and layout of 4 bit CPA using Multiple supply voltages to minimize Dynamic power dissipation and optimize Energy-Delay Product.

• Analog Integrated Circuits:

• Digital to Analog Converter (DAC) design: Design of signed 3 bit Differential DAC using R-2R ladder architecture and charge redistribution switched capacitor converters for rate of 1 MHz and 10 bit accuracy.

• Low Pass Filter: Design of a 5th order Chebyshev Low pass filter having 1dB ripple and 4 MHz cutoff frequency. An initial RLC prototype was designed and replaced with linear transconductors.

• Op-Amp Design: A doubly folded current mirror topology and rail-rail voltage of+1.5V to -1.5Vwas used. This project involved estimation of parameters: Loop gain, Slew Rate, Gain-Bandwidth product and Phase Margin.

• Microwave Circuits:

• Low Noise Amplifier (LNA) Design: Design and layout of LNA operating within 2.4GHz to 2.48GHz. The LNA uses cascode topology and analyses involved parasitic estimation, S-parameters and IIP3 calculation.

• RF Circuits and Systems:

• Multi-Gigabit Wireless Data Link: Design of point-point data link system having 4 Gb/s speed and BER better than 106. The system uses 16-QAM modulation for a TDD transceiver operating in the 60 GHz unlicensed band.

• Reconfigurable Computing:

• 2D Convolution Kernel: Developed a 3x3 convolution kernel for time domain convolution of a 512x512 gray scale image. System implemented in XilinxV4LX100 on Nallatech board.

• Computer Architecture: 

• Instruction Set Simulator (ISS) and Cache Optimization: Simulation of MIPS like pipeline stage for custom benchmarks and Instruction set. Energy performance tradeoff analyzed for Instruction cache optimization.

• Antenna Systems:

• Antenna Design for Doppler radar motion sensor applications: A Transmitter-Receiver microstrip patch antenna on the same substrate having maximum Gain, minimum Beam width and maximum isolation.

HONORS:         Best Project Award:                    Antenna Systems

                        Top 5 Teams:                             DAC design, LNA Design, Multi-Gigabit Wireless Data Link Design

REFERENCES: Available upon request.