(For italics text, please refer to glossary)

Objective:

A Senior hardware engineer position in Southern California area, San Diego not included. 

Experience

Highlights:

20 years of experience in system/hardware board design, from design specification to product delivery, directing a small group of people sometimes.  In depth knowledge in digital and analog electronics, programmable devices and programming languages, personal computer architects and designs, digital data processing, video image technology, various interface standards (VME, PCI, PCI-X, PCI-Express, PMC, AGP, FPDP, Serial FPDP, Ethernet, Rapid IO, Serial ATA, DVI, Homeplug, IEEE 1394, USB, NTDS protocol…), A/D and D/A conversions, power and high power regulations, high speed issues and design, PCB designs, EMI issues and regulatory compliances.

Duties include defining and planning projects, leading design teams and managing schedule and resources, solving technical problems, implementation, prototyping, debug, test, interface to the customers, supporting upgrades and manufacturing. 

Education:

M.S.E.E., Aug. 1988, Texas Tech University, Lubbock, Texas.

B.S.E.E., May 1986, Texas Tech University, Lubbock, Texas.

Thesis Topic

and Project:

A Vision System for a Small Image Array.  Designed and developed a PC based camera driver/video digitizer system for a small-area CCD image sensor.  The system employed software signal processing techniques, hardware memory expansion and interface, A/D digitizing, digital and analog circuitry. Digital circuits were implemented using Altera EPLD and TTL/CMOS devices.

Employment:

(Jan. 2007 to

present)

KOR Electronics.  KOR Electronics designs and manufactures radar signal equipments for training and electronic warfare.  My duties included design of high speed hardware board, coding Xilinx FPGA, and modifying, testing and debugging existing hardware.

Major Task:

I. DIS-512.  A Gigahertz digital A/D and D/A board that drives a 512 point modulator device, with a Xilinx FPGA and digital on board memory.

II. Boeing 1444.  The project included Xilinx coding for Doppler calculations and hardware implementation.

III. Digital RF Memory boards test and debug.

IV. Modification of Xilinx codes for new functions.

(August 2004 to Jan. 2007)

TEAC Aerospace.  TEAC designs and manufactures flight data recorders for military and civilian aircrafts. Technologies included MIL-STD-1553, Pulse-code modulation, PCI.  I was hired to design microprocessor electronic boards under potential Boeing Contracts.  The Boeing projects were eventually cancelled.

Major Task:

I. Motorola MPC8555 Based Dual Ethernet PCI-X capable Communication Board.  MPC8555 processor is designed specifically to support high speed communications.  It offers the flexibility of supporting various communication protocols, direct PCI bus interface, and memory interfaces including DDR.  

II. Flight recorder modification designs.  Modifying existing designs to meet  various proposal requirements.

III. Current product supports.  Supports include debugging based on field reports, suggesting solutions, documentation.

(June 2003 to

August 2004 )

Micro Memory.  Micro Memory designs and manufactures active disc electronic boards for data applications and backups.  My duties included electronic board designs, leading a small team for system design, engineering process setup, procurement and manufacturing. Minor programming and marketing research functions.

Major Task:

I. Mother board active disc(MM-7460).  A computer motherboard with a Motorola Power PC(MPC8245), supports up to 64GByte SDRAM memory, 4 PCI 66MHz slots, 1 PMC slot, 1 Gigabit Ethernet(82545EM) link, and 2x SATA(88SX5080) hard drives.  Hardware included 3 PCI-X bridges(PLX6540), 2 PCI Memory controllers with DMA, and 2x600W redundant power supplies.

II.  PCI-X board with 1Gbyte memory and 24 SATA channels(MM-5429).  A full length, full height PCI-X card supported up to 1Gbyte of SDRAM memory with battery back up to 72 hours. Hardware included 3 SATA controllers(88SX5081), 3 PCI-X bridges(31154), with power circuit to provide power.

III.  PMC board with dual serial FPDP agents(MM-6137FC).  A PMC board with 2 serial FPDP interface channels. Each channel has a maximum full duplex speed at 247MByte/s, and the combined 2 channels supported 460MByte/s.  Implementation used Systran’s PMC/SFPDP chipsets, 20bit serial/deserializers, and ZBT memory as receiving FIFOs.  Major internal buses were running at 125MHz and serial optical fibers at 2.5GHz.   

(Aug. 2001 to

 April 2003)

Valence Semiconductor.  Valence was an IC design house with products in Wireless GPS chips, Residential Networking HomePlug ICs, Digital Media DVI transmitters and receivers, Broadband Network Processors.  The Company philosophy was to offer all residential communication needs under one roof.  My duties as an application engineer included building marketing reference boards, reviewing customer’s designs, writing FPGA codes for tests, providing supports, writing design manual/data sheets.

Major Task:

I.  Homeplug product line support.  Building reference designs, writing FPGA test codes, reviewing customer’s designs, writing design manual/data sheets, answering questions and various other activities related to this product line.

II.  Valence DVI-SAVII(9181) receiving board.  A video converter using Valence’s DVI receiver VS9181. Hardware included a high definition DAC (ADV7196) for HDTV and a standard DAC(Bt864) for standard TV, an audio DAC(UDA1351), along with a microcontroller(89C668) for configuration.

III.  Valence DVI-SAVII (9180) transmitting board.  A video converter using  Valence’s DVI transmitter VS9180. Hardware included an ADC(ADV7185), a microcontroller(89C668) for configuration.

IV.  Xilinx Interface bridge design for Wireless LAN (802.11a) reference board.  The board had one transmit channel and one receive channel, each channel was implemented in a Xilinx devices (Virtex-E, XCV2000E). VHDL coding included a FPDP interface, a PC parallel interface, transmitting and receiving channel interfaces.

V.  Xilinx Interface bridge design for HomePlug verification board.  This board severed as a verification vehicle for the HomePlug AFE device, and it was PC driven with on-board memory and with a Xilinx coded with Verilog HDL.

(March 1996 to

 Aug. 2001 )

Anigma Inc.  Anigma was primarily a PC motherboard design house, using the latest industry standard microprocessors and PC chipsets from leading manufacturers.  Major customers were Intel, Gateway, HP.

Major Task:

I.  HP server motherboard. A dual Slot1 system with Reliance Computer Corp’s chipset. 133MHz front-side bus, 8GB memory, VGA graphic and AGP slot, 33MHz Primary and 66MHz secondary PCI slots, Intel 10/100TX LAN device, Crystal Audio controller and MIDI port, HDD, Floppy, USB ports, serial, parallel ports, PS/2 keyboard/mouse, modified ATX form factor, 8-layer PCB, double side component.

II.  Gateway PC production motherboard. A Celeron processor with Intel BX/ZX chipset. 100MHz front-side bus, 512MB memory, 3DFX Banshee graphic controller with 8MB graphic memory, Ensoniq Audio controller, AGP/PCI/ISA slots, HDD, Floppy, USB ports, serial, parallel ports, PS/2 keyboard/mouse, micro ATX form factor, 4-layer PCB, single side component. 

The project included two other variations.  One motherboard used an older 3DFX graphic controller with less graphic memory, and the other used an AMD’s K6 processor.  There were a total of 3 designs.

III.  A LCD plug-in card for Gateway PC production motherboard. A plug-in card for flat panel display.  3DFX xLCD controller, Silicon Image SIL150 transmitter, an Anigma defined 40-pin connector for Gateway motherboard interface, 4-layer PCB, single side component.

IV.  Intel reference motherboard. A slot1 processor with Intel BX chipset. 100MHz front-side bus, 512MB memory, ATI graphic controller with 4MB graphic memory, ATI video encoder, Yamaha Audio controller, AGP/PCI/ISA slots, HDD, Floppy, USB ports, serial, parallel ports, PS/2 keyboard/mouse, ATX form factor, 4-layer PCB, single side component.

V.  VMIC production motherboard. A Pentium class motherboard with Intel TX chipset.  66MHz front-side bus, external L2 Cache memory, one DIMM memory socket, Cirrus Logic Graphic controller with 2MB graphic memory, DEC 10/100TX LAN device, HDD, Floppy, USB ports, serial, parallel ports, PS/2 keyboard/mouse, PMC expansion connector, PCI/VME bridge connector, VME connectors for power only, VME 6U form factor, 8-layer PCB, double side component.

VI.  OPTi reference motherboard.  A Pentium class motherboard with OPTi’s single PC chipset. 66MHz front-side bus, external L2 Cache memory, SIMM and DIMM memory modules, RTC, PCI and ISA buses, USB, serial, parallel ports, keyboard/mouse, ATX form factor, single side component.

VII. Toshiba set top computer.  An entertainment set top box featuring DVD for consumer market.  The system was a Pentium class PC with Toshiba chipset. 66MHz front-side bus, external L2 Cache memory supports up to 16MB memory, Chromatic Research Mpact-1 system for multimedia (3-D, 2-D graphics, AC-3 stereo audio, and modem), Analog Device video encoder for NTSC Composite and S-video signal outputs, TI IEEE 1394 controller, HDD, USB ports, PCMCIA, PS/2 keyboard/mouse. Toshiba specified form factor(approximately 6x9 inches), 8-layer PCB, double side component.

(Jan. 1993 to

March 1996)

Sabtech Industries.  Sabtech specialized in offering hardware and software products for the NTDS market.  NTDS is a family of bi-directional communication protocols employed by US Navy and Air force.  NTDS family covers NTDS Type A, NTDS Type B….), about 10 different types. 

Major Task:

I.  NTDS/PCI product line. A new product line using modularized design approach implemented in VHDL code.  Each NTDS board had its own NTDS Type input/output VHDL modules while all other modules were common in the product line. PCI interface was implemented with a PLX bridge.

I was involved in all aspects of this product line design, architect, functional blocks, specifications, support VHDL coding and hardware implementation.

The project was a great success.  Sabtech continued to develop products based on these modules, different NTDS types, mixed or/and multiple NTDS channels on one hardware platform, customed NTDS….  These modules were also modified to develop other NTDS product lines.  In addition, this project also help setting up Sabtech engineering design and documentation processes.

II.  NTDS/VME product line. A new product line for NTDS VME market.  This was a modularized design with one VME motherboard and different piggybacks to support different NTDS Types. Four piggybacks were completed to support Type A, A/B, C, and E. 

The motherboard featured a Motorola 68340 microprocessor with 2 DMA channels, 2 serial ports, and 2 user timers, a Cypress VME controller and Cypress companion devices for full VME interface features, a DRAM controller and 4MB memory with 3MB hiding option for A24 systems, 2 flesh memories (one for the system bootup and one for the user), 2 FIFOs working with DMA channels to increase the speed of data transfer, data swapping circuit to resolve differences between Intel and Motorola data structure, VME P2 NTDS access, motherboard/piggyback data multiplexing and demultiplexing,  NTDS passive and active taps. The piggybacks supported full NTDS interfaces, time tag, motherboard/piggyback data multiplexing and demultiplexing circuit.   Control logic written in ABEL codes and implemented in Atmel PLDs

III.  NTDS/PC half size interface card.  Modified the existing full size ISA version with an improved design, surface mount technologies to build a half size ISA card for laptop and portable PC market.  Also fixed known bugs. 

(Dec. 1988 to

 Jan. 1993 )

Cymbolic Sciences International(CSI). CSI developed and manufactured Auto Optical Inspection Machines (AOI), Photo Plotters, and other Imaging equipment. 

Major Task:

I.  Multiple Image Line Detector.  Project was designed to track lines of different width on a PCB board.  Implemented with Xilinx FPGA, PLDs, and TTL/CMOS. 

II. Parallel and Serial Data Converter.  Project was designed to convert data in parallel format to serial stream, with data compression and expansion using CCITT Modified Huffman code, implemented with TTL/CMOS logic and PALs.

III.  Image Recognizer.   The Board analyzed features on printed circuit boards based on mathematics models and it triggered on features and/or flaws.  Implemented with Xilinx FPGAs and PALs and TTL/CMOS logic.

IV.  Design of image grabber.  Processed and digitized video signals for analysis, implemented with TTL/CMOS logic and PALs.

(May 1986 to

May 1988)

Teaching Assistant, Electrical and Electronics Technology Dept., Texas Tech University, teaching junior and senior level courses and labs, including lecture, lab projects, grading, tests, and evaluation.

Design Tool:

Xilinx ICE, Aldec, Lattice ispDesignEXPRRT, ViewLogic schematic ProCapture, OrCAD/ESP design environment, P-Cad, ABEL, Altera EPLD Development System, AutoCad, Windows Office.

Programming Language:

VHDL, FORTRAN, BASIC, some C, and some Assembly Languages.

Test Equipment:

Oscilloscope, logic analyzer, spectrum analyzer, multimeter, in-circuit-emulator (ICE).

License:

EIT(Engineering in Training, prerequisite for PE exam), No. XE081556, California.

Clearance:

Interim.  Application in progress.

References:

Available upon request.