Copyright: 1996 - 2024
BSEE - KB3UON
RF Cafe began life in 1996 as "RF Tools" in an AOL screen name web space totaling
2 MB. Its primary purpose was to provide me with ready access to commonly needed
formulas and reference material while performing my work as an RF system and circuit
design engineer. The World Wide Web (Internet) was largely an unknown entity at
the time and bandwidth was a scarce commodity. Dial-up modems blazed along at 14.4 kbps
while tying up your telephone line, and a nice lady's voice announced "You've Got
Mail" when a new message arrived...
All trademarks, copyrights, patents, and other rights of ownership to images
and text used on the RF Cafe website are hereby acknowledged.
My Hobby Website:
Breakdown voltages affects in BJT/HBT - RF Cafe Forums
RF Cafe Forums closed its virtual doors in 2012 mainly due to other social media
platforms dominating public commenting venues. RF Cafe Forums began sometime around
August of 2003 and was quite well-attended for many years. By 2010, Facebook and
Twitter were overwhelmingly dominating online personal interaction, and RF Cafe
Forums activity dropped off precipitously. If the folks at
phpBB would release a version with integrated
sign-in from the major social media platforms, I would resurrect the RF Cafe Forums,
but until then it is probably not worth the effort. Regardless, there are still
lots of great posts in the archive that ware worth looking at.
Below are the old forum threads, including responses to the original posts.
|-- Amateur Radio
Gripes & Humor
-- CAE, CAD, &
Test & Measurement
Post subject: Breakdown voltages affects in BJT/HBT Posted:
Wed Feb 08, 2006 8:20 pm
I am a student and
I need to clarify a point. This questino relates to integrated cirucit
transistor and not discrete transistors.
I am using HBT (basically
BJT structure) and I was doing DC sweep. When I had just one HBT device
and I ran the sweep from IBB=10u to 80uA with VCE=0 to 2.5 it works
But when I have two same devices in parallel and I did
DC sweep for the same ranges I get the warning that the base-emitter
and base-collector are in reverse bias breakdown.
counter intiutative (may be just because of my lack of knowledge). I
thought that now that I have two devices in parallel, the overall transistor
should be able to handle more current or at least the same amount of
current as the single device and should have the same voltage limiations
as the single device because the two devices are in parallel. Why do
you think the device is breakdown? Doesn't parallel mean that the collector
and base of the two devices are connected together? Thank you.