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simsale
Post subject: FET oscillator design - HELP! Posted: Fri Oct 28, 2005 12:32 am
Hello everybody,

i am trying to build a balanced FET oscillator (2 FETs resonate each other through a transmission line) and i have a strange problem with the bias. I bias the FET independently at gate and at the drain. At some point, i cannot change my gate bias anymore (to a more positive value, say at around -0.6V i cannot go to -0.5 anymore) unless i decreasy my drain bias. What can this mean?

In addition, my oscillator oscillates at the wrong frequency but this frequency does not come from the circuit i built but apparently from the instability in the transistor even if i did not measure any instability when i identified the S-parameters. What can the problem be?

Thank you very much! I am not very experienced with active circuits, so i appreciate every every answer....
I really don't know how to go on

simsale


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Guest
Post subject: FET OscillatorPosted: Tue Nov 01, 2005 2:29 pm
What your bias condition means is that the feedback is strong enough to cause the gate-to-channel diode to conduct (assuming you're using a pair of JFETs or MESFETs - you didn't specify...)

The more details you provide the easier it is to answer questions. Frequencies, voltages, device part numbers, etc. all help us to answer your questions.

In general, oscillation occurs at the frequency or frequency where the loop gain is 1 and the phase shift around the loop is n x 360 degrees, where n is a non-negative integer (0,1,2,3, and so on). So just because the FET is stable in and of itself doesn't mean much about a circuit - and it's easy to get unintended feedback! Layout often makes the difference between an excellent design and a poor one - and an abstract schematic doesn't always capture the important details at RF.

Good Luck!


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Graham
Post subject: Posted: Wed Nov 02, 2005 7:42 am

Colonel


Joined: Fri Sep 02, 2005 7:25 pm
Posts: 34
Location: Hampshire UK
Theres a hundred ways this can happen to you.
First thing you / we need to know is the frquency range over which the FET devices have gain. Next is the (apparently fixed) frequency of the oscillator.
For an (extreme!) example, if you are using something like a pair of PHEMTs with gain up to 7GHz and you are trying to make a 180MHz oscillator, then it will take off by itself unless you get a good grip on the layout!

I don't know the circuit, though I suspect its maybe of the balanced type known as "kaliatron", but whatever the mechanism, you need to understand completely where your oscillator gets the gain energy to amplify some noise that will break into the desired oscillation mode, and more, you need to know what gain non-linearity is going to set the level it tops out at. This might, for example, be done in a controlled way using dual-gate FETs.

A thing like "I cannot change my gate bias from -0.6 to -0.5" usually means the poor thing is revving away at some frequency you didn't think of, possibly even a low frequency (squegging - some folk call it). Your transmission line with a FET switching away at each end is going to present to that line some impedances that may well reflect energy way outside of the frequency you intend, and have a journey time that allows this (unwanted) oscillation to arrive with a phase that sustains itself.


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Guest
Post subject: VoicePosted: Thu Nov 03, 2005 5:32 pm
Quote:
Theres a hundred ways this can happen to you.


You sound rather stressed. )



Posted  11/12/2012
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