Copyright: 1996 - 2024
BSEE - KB3UON
RF Cafe began life in 1996 as "RF Tools" in an AOL screen name web space totaling
2 MB. Its primary purpose was to provide me with ready access to commonly needed
formulas and reference material while performing my work as an RF system and circuit
design engineer. The World Wide Web (Internet) was largely an unknown entity at
the time and bandwidth was a scarce commodity. Dial-up modems blazed along at 14.4 kbps
while tying up your telephone line, and a nice lady's voice announced "You've Got
Mail" when a new message arrived...
All trademarks, copyrights, patents, and other rights of ownership to images
and text used on the RF Cafe website are hereby acknowledged.
My Hobby Website:
substrate terminal - RF Cafe Forums
RF Cafe Forums closed its virtual doors in 2012 mainly due to other social media
platforms dominating public commenting venues. RF Cafe Forums began sometime around
August of 2003 and was quite well-attended for many years. By 2010, Facebook and
Twitter were overwhelmingly dominating online personal interaction, and RF Cafe
Forums activity dropped off precipitously. If the folks at
phpBB would release a version with integrated
sign-in from the major social media platforms, I would resurrect the RF Cafe Forums,
but until then it is probably not worth the effort. Regardless, there are still
lots of great posts in the archive that ware worth looking at.
Below are the old forum threads, including responses to the original posts.
|-- Amateur Radio
Gripes & Humor
-- CAE, CAD, &
Test & Measurement
Post subject: substrate terminal Posted: Mon Dec 18, 2006
Joined: Tue Nov 14, 2006 7:21 pm
what should be the effects if we dont
connect substrate terminal to the ground in CMOS process?
Post subject: SubstratePosted: Mon Dec 18,
2006 12:33 pm
Joined: Wed Feb 22, 2006 3:51
Not connecting the substrate to
ground in a CMOS process would have differing results, depending on
what it is connected to:
1. Nothing. A floating substrate will
cause roughly one-half of the mosfets to operate improperly. Which half
would depend on whether your process was N-well or P-well. (As an aside:
when I covered for a professor during a sabbatical, I was able to watch
the students try to find out why their labs weren't working - a lot
of very strange effects showed up due to an open substrate connection.
2. Negative voltage (for a normally-powered chip): Unless Vdd(max)
is exceeded, you'll only encounter problems if the substrate is inadequately
3. Positive voltage: depending on the voltage, as you
increase from 0 volts, you'll increasingly move away from proper operation
until your design doesn't work.