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LDMOS transistors screwed!! - RF Cafe Forums

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Corvus Demenus
 Post subject: LDMOS transistors screwed!!
Posted: Thu Jul 28, 2005 11:18 am 
Hi everybody!!!

I am working with LDMOS power transistors managing powers of about 40dBm and I am having a lots of problems with all of them. They are very sensitive not like bipolar transistors and its very simple to get them screwed!!Anyone knows the weak point of this transistors in order to attack directly the problem?

Cheers


 
  
 
IR
 Post subject:
Posted: Thu Jul 28, 2005 1:13 pm 
 
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Joined: Mon Jun 27, 2005 2:02 pm
Posts: 392
Location: Germany
Hello Corvus Demenus,

Yes that is a known problem with LDMOS transistors - but not all of them. The problem is due to a protection diode in the Gate Source region, that protects the transistor from negative voltages. When a negative voltage reaches a certain level the diode clamps it, and by that is being short-circuited. I know that some people are fusing the diode by providing a large enough spike of voltage to the Gate, but I don't know how much this is effective.

A better solution to this problem would be to limit the input power to the transistor. I can tell you from my long experience with LDMOS (and I am talking about Freescale's MRF series) that for UMTS band the transistors don't suffer from this problem. For lower frequencies e.g 470-860MHz this problem exist. You can find another manufacturer (like Philips), which doesn't use (so far) in this protection mechanism.

Of course you have to be very cautious and use ESD wrist when handling the devices, and apply the correct input and output matching to the transistors (According to the data sheet).

Please let me know what frequency band do you use?

_________________
Best regards,

- IR


 
   
 
Corvus Demenus
 Post subject:
Posted: Fri Jul 29, 2005 10:03 am 
Thanks IR,

I am using Motorola transistors, within frecuencies between 470-860MHz. I was wondering if you can said me how can I fuse the diode providing voltatge to the Gate, sounds a great idea!! By this moment I am trying to limit the input power and certainly I improve the life of transistors but is not enough, I need 99% security!!

Please it would be wonderful if you can provide me information!!!


 
  
 
IR
 Post subject:
Posted: Fri Jul 29, 2005 12:57 pm 
 
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Joined: Mon Jun 27, 2005 2:02 pm
Posts: 392
Location: Germany
Hello Again,

I think that positive voltage of between 10-20V applied between the Gate and Source (Gate is the positive) should do the job. You should see a current transient of few ampers, that means the diode is fused. I haven't done that myself

The best thing would be to check other manufacturer as I said in my previous post.

Do you use the same kind of transistor model in consecutive stages? Namely does a MRF372 drive the following stage, which is MRF372 as well? If yes, this is the main cause of the problem, since you should always use a stage with a Pout capability that is at least 5dB lower than the following stage. The driving transistor can output power levels which can be higher than the input of the following stage can handle, especially if you are using high peak/average signals. I understand that with Motorola it is impossible since they narrowed the 470-860MHz product family to 2 transistor models. This is why I recommend to shift to another manufacturer.

_________________
Best regards,

- IR


 
   
 
Corvus Demenus
 Post subject:
Posted: Mon Aug 01, 2005 7:08 am 
Well, in fact I am using BJT class A transistor as a driver and a class AB pallet as a power amplifier, no problem with consecutive stages. The pallet uses two MRF 372 transistors from Motorola, so its difficult to change the manufacturer, I should find an equivalent pallete... I am looking at equivalent Phillips transistors but I only find BLF647 and BLF861, both giving only 150W less than 300W from Motorola transistor.


 
  
 
IR
 Post subject:
Posted: Mon Aug 01, 2005 9:27 am 
 
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Joined: Mon Jun 27, 2005 2:02 pm
Posts: 392
Location: Germany
I think that Philips has a model that gives a power level of 250W.
Do you use the MRF372*2 in a balanced amplifier configuration to output the 300W?

Do you use the same design as in the reference design provided in the transistor's data sheet? I am asking, because this transistor need thermal compensation for Ids drift.

_________________
Best regards,

- IR


 
   
 
Corvus Demenus
 Post subject:
Posted: Mon Aug 01, 2005 11:14 am 
I am using an entire pallet named LDU300 from Richardson E. providing me enough power output, so all the configurations for transistors have done by manufacturer. Another think is in which way the manufacturer has done his work properly. Possibly I have to think into design for myself the entire power stage avoiding this product. If it was this case, can you recommend me a good info source:books, webs...


 
  
 
IR
 Post subject:
Posted: Mon Aug 01, 2005 11:43 am 
 
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Joined: Mon Jun 27, 2005 2:02 pm
Posts: 392
Location: Germany
You can find useful information in Eudyna (Formerly Fujitsu) website.

http://www.us.eudyna.com

There are good app. notes there (With their specific transistors, but still discussing the general idea of balanced and push-pull power amplifiers).

I recommend that you stick to the suggested reference circuit per given transistor: The substrate and the matching/bias networks. Don't get into adventure by trying to alter their design .

_________________
Best regards,

- IR


 
   
 
Corvus Demenus
 Post subject:
Posted: Tue Aug 02, 2005 6:35 am 
Thanx for the web address!!Very useful info!!!

I am using a balanced configuration thanks to baluns and 3dB quadrature couplers. I think is a good configuration for my requirements..


 
  
 
komm1
 Post subject:
Posted: Mon May 22, 2006 5:18 pm 
 
Lieutenant

Joined: Mon May 22, 2006 5:02 pm
Posts: 1
Hi guys,

I am having similar problems with freescale ldmos. I am trying to test 2 different versions for frequencies around 2.14 GHz and a keep getting a short circuit between gate and source. It should handle output of at least 30dBm. I have a specific design based on microstrip, so no other ldmos will do for now. The gate-source is shorted before I even test for small signal s-parameters. I've checked and rechecked the circuit and re-simulated 1000 times and still have no idea of what I am doing wrong. Any help would be much appreciated.
Thanks
Helias





Posted  11/12/2012
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