RF Cascade Workbook for Excel
RF & Electronics Symbols for Visio
RF & Electronics Symbols for Office
RF & Electronics Stencils for Visio
RF Workbench
T-Shirts, Mugs, Cups, Ball Caps, Mouse Pads
Espresso Engineering Workbook™
Smith Chart™ for Excel
|
|
AWR Expands Patent Portfolio and Receives Patent for Block-Specific
Harmonic Balance Analysis System in Electrical Circuit Design
|
March 7, 2012 Press Release
El Segundo, California – March 7, 2012 –
AWR Corporation,
the innovation leader in high-frequency EDA software, has been issued
a US Patent by the United States Patent and Trademark Office for a “block-specific
harmonic balance analysis system.” Originally filed on December 3, 2008,
US Patent No. 8,131,521 addresses circuit simulation using multi-rate
harmonic balancing. Specifically, the invention -- known as MRHB™ and
first available within AWR’s 2009 product release -- speeds the design
of complex circuits by enabling the effective reduction of analysis
dimensions (e.g., frequency or time). "MRHB satisfies
the needs of our customers to perform steady-state analysis of distributive
or dispersive systems with more than two or three signal sources," said
Taisto Tinttunen, chief director of engineering of AWR's APLAC® division,
who explained the limitation of previous tools and the significance
of MRHB. "Harmonic balance engines traditionally do not scale well as
the number of tones increases. As a result, simulating a complete receiver
or high-speed digital circuit was extremely difficult or impossible
because of the high computational cost of nonlinear model evaluations
and the extensive memory utilization. MRHB eliminates this limitation
by defining harmonic balance analysis on a block-by-block basis. Reducing
filtered sources and their harmonics by defining new hybrid tones based
on linear combinations of the source tones, as MRHB does now, makes
it possible to simulate designs that were previously beyond the reach
of the harmonic balance technique." AWR was also recently
awarded U.S. Patent No. 7,346,480, entitled "Impedance Mismatch Modeling
in a Data Flow or Discrete Time Based System Simulation.” This invention
pertains to directional connectivity described by the interconnections
of blocks in a schematic (or netlist) and can be used to propagate arbitrary
data from one block to another. For instance, the propagation of impedance
data for discrete time-based simulation programs allows for simulation
under less than ideal termination conditions between blocks, reducing
simulation time and complexity and producing better results.
AWR’s entire patent portfolio can be seen online at
www.awrcorp.com/patents
Visit AWR at:
AWR.TV,
AWR Blogs,
Facebook,
Twitter,
and
YouTube.
Contact:
Sherry
Hess Vice President of Marketing AWR Corporation (310) 726-3000
hess@awrcorp.com
Posted 3/7/2012
|
|
|
|