Module 14 - Introduction to Microelectronics
Navy Electricity and Electronics Training Series (NEETS)
Chapter 1:  Pages 1-21 through 1-30

Figure 1-21A. - TO-5 mounting PLUG-IN MOUNTING

Figure 1-21B. - TO-5 mounting EMBEDDED CAN(LEADS PLUGGED IN)

Flat Pack

Many types of IC flat packs are being produced in various sizes and materials. These packages are available in square, rectangular, oval, and circular configurations with 10 to 60 external leads. They may be made of metal, ceramic, epoxy, glass, or combinations of those materials. Only the ceramic flat pack will be discussed here. It is representative of all flat packs with respect to general package requirements (see figure 1-22).

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Figure 1-22. - Enlarged flat pack exploded view.

After the external leads are sealed to the mounting base, the rectangular area on the inside bottom of the base is treated with metal slurry to provide a surface suitable for bonding the monolithic die to the base. The lead and the metalized area in the bottom of the package are plated with gold. The die is then attached by gold-silicon bonding.

The die-bonding step is followed by bonding gold or aluminum wires between the bonding islands on the IC die and on the inner portions of the package leads. Next, a glass-soldered preformed frame is placed on top of the mounting base. One surface of the ceramic cover is coated with Pyroceram glass, and the cover is placed on top of the mounting base. The entire assembly is placed in an oven at 450 degrees Celsius. This causes the glass solder and Pyroceram to fuse and seal the cover to the mounting base. a ceramic flat pack is shown in figure 1-23. It has been opened so that you can see the chip and bonding wires.

Figure 1-23. - Typical flat pack.

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Dual Inline Package

The dual inline package (DIP) was designed primarily to overcome the difficulties associated with handling and inserting packages into mounting boards. DIPs are easily inserted by hand or machine and require no spreaders, spacers, insulators, or lead-forming tools. Standard hand tools and soldering irons can be used to field-service the devices. Plastic DIPs are finding wide use in commercial applications, and a number of military systems are incorporating ceramic DIPS.

The progressive stages in the assembly of a ceramic DIP are illustrated in figure 1-24, views (A) through (E). The integrated-circuit die is sandwiched between the two ceramic elements, as shown in view (A). The element on the left of view (A) is the bottom half of the sandwich and will hold the integrated-circuit die. The ceramic section on the right is the top of the sandwich. The large well in view (B) protects the IC die from mechanical stress during sealing operations. Each of the ceramic elements is coated with glass which has a low melting temperature for subsequent joining and sealing. View (B) shows the Kovar lead frame stamped and bent into its final shape. The excess material is intended to preserve pin alignment. The holes at each end are for the keying jig used in the final sealing operation. The lower half of the ceramic package is inserted into the lead frame shown in view (C). The die is mounted in the well and leads are attached. The top ceramic elements are bonded to the bottom element shown in view (D) and the excess material is removed from the package. View (E) is the final product.

Figure 1-24. - DIP packaging steps.

Ceramic DIPs are processed individually while plastic DIPs are processed in quantities of two or more (in chain fashion). After processing, the packages are sawed apart. The plastic package also uses a Kovar lead frame, but the leads are not bent until the package is completed. Because molded plastic is

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used to encapsulate the IC die, no void will exist between the cover and die, as is the case with ceramic packaging.

At present, ceramic DIPs are the most common of the two package types to be found in Navy microelectronic systems. Figure 1-25 shows a DIP which has been opened.

 Figure 1-25. - Dual inline package (DIP).

RECENT DEVELOPMENTS IN PACKAGING

Considerable effort has been devoted to eliminating the fine wires used to connect ICs to Kovar leads. The omission of these wires reduces the cost of integrated circuits by eliminating the costs associated with the bonding process. Further, omission of the wires improves reliability by eliminating a common cause of circuit failure.

A promising packaging technique is the face-down (FLIP-CHIP) mounting method by which conductive patterns are evaporated inside the package before the die is attached. These patterns connect the external leads to bonding pads on the inside surface of the die. The pads are then bonded to appropriate pedestals on the package that correspond to those of the bonding pads on the die (figure 1-26).

Figure 1-26. - Flip-chip package.

The BEAM-LEAD technique is a process developed to batch-fabricate (fabricate many at once)

semiconductor circuit elements and integrated circuits with electrodes extended beyond the edges of the

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wafer, as shown in figure 1-27. This type of structure imposes no electrical difficulty, and parasitic capacitance (under 0.05 picofarad per lead) is equivalent to that of a wire-bonded and brazed-chip assembly. In addition, the electrodes may be tapered to allow for lower inductance, impedance matching, and better heat conductance. The beam-lead technique is easily accomplished and does not have the disadvantages of chip brazing and wire bonding. The feasibility of this technique has been demonstrated in a variety of digital, linear, and thin-film circuits.

Figure 1-27. - Beam-lead technique.

Another advance in packaging is that of increasing the size of DIPs. General purpose DIPs have from 4 to 16 pins. Because of LSI and VLSI, manufacturers are producing DIPs with up to 64 pins. Although size is increased considerably, all the advantages of the DIP are retained. DIPs are normally designed to a particular specification set by the user.

Q29.   What is the purpose of the IC package?

Q30.   What are the three most common types of packages?

Q31.   What two methods of manufacture are being used to eliminate bonding wires?

EQUIVALENT Circuits

At the beginning of this topic, we discussed many applications of microelectronics. You should understand that these applications cover all areas of modern electronics technology. Microelectronic ICs are produced that can be used in many of these varying circuit applications to satisfy the needs of modern technology. This section will introduce you to some of these applications and will show you some EQUIVALENT Circuit comparisons of discrete components and integrated circuits.

J-K FLIP-FLOP and IC SIZES

Integrated circuits can be produced that combine all the elements of a complete electronic circuit. This can be done with either a single chip of silicon or a single chip of silicon in combination with film components. The importance of this new production method in the evolution of microelectronics can be demonstrated by comparing a conventional J-K flip-flop circuit incorporating solid-state discrete devices and the same type of circuit employing integrated circuitry. (A J-K flip-flop is a circuit used primarily in computers.)

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You should recall from NEETS, Module 13, Introduction to Number Systems, Boolean Algebra, and Logic Circuits, that a basic flip-flop is a device having two stable states and two input terminals (or types of input signals), each of which corresponds to one of the two states. The flip-flop remains in one state until caused to change to the other state by application of an input voltage pulse.

A J-K flip-flop differs from the basic flip-flop because it has a third input terminal. a clock pulse, or trigger, is usually applied to this input to ensure proper timing in the circuit. An input signal must occur at the same time as the clock pulse to change the state of the flip-flop. The conventional J-K flip-flop circuit in figure 1-28 requires approximately 40 discrete components, 200 connections, and 300 processing operations. Each of these 300 operations (seals and connections) represents a possible source of failure. If all the elements of this circuit are integrated into one chip of silicon, the number of connections drops to approximately 14. This is because all circuit elements are intraconnected inside the package and the 300 processing operations are reduced to approximately 30. Figure 1-29 represents a size comparison of a discrete J-K circuit and an integrated circuit of the same type.

Figure 1-28. - Schematic diagram of a J-K flip-flop.

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Figure 1-29. - J-K flip-flop discrete component and an IC.

IC PACKAGE LEAD IDENTIFICATION (NUMBERING)

When you look at an IC package you should notice that the IC could be connected incorrectly into a circuit. Such improper replacement of a component would likely result in damage to the equipment. For this reason, each IC has a REFERENCE MARK to align the component for placement. The dual inline package (both plastic and ceramic) and the flat pack have a notch, dot, or impression on the package. When the package is viewed from the top, pin 1 will be the first pin in the counterclockwise direction next to the reference mark. Pin 1 may also be marked directly by a hole or notch or by a tab on it (in this case pin 1 is the counting reference). When the package is viewed from the top, all other pins are numbered consecutively in a counterclockwise direction from pin 1, as shown in figure 1-30, views (A) and (B).

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Figure 1-30A. - DIP and flat-pack lead numbering. DIP

Figure 1-30B. - DIP and flat-pack lead numbering. Flat-Pack

The TO-5 can has a tab for the reference mark. When numbering the leads, you must view the TO-5 can from the bottom. Pin 1 will be the first pin in a clockwise direction from the tab. All other pins will be numbered consecutively in a clockwise direction from pin 1, as shown in figure 1-31.

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Figure 1-31. - Lead numbering for a TO-5.

IC IDENTIFICATION

As mentioned earlier, integrated circuits are designed and manufactured for hundreds of different uses. Logic circuits, clock circuits, amplifiers, television games, transmitters, receivers, and musical instruments are just a few of these applications.

In schematic drawings, ICs are usually represented by one of the schematic symbols shown in figure 1-32. The IC is identified according to its use by the numbers printed on or near the symbol. That series of numbers and letters is also stamped on the case of the device and can be used along with the data sheet, as shown in the data sheet in figure 1-33, by circuit designers and maintenance personnel. This data sheet is provided by the manufacturer. It provides a schematic diagram and describes the type of device, its electrical characteristics, and typical applications. The data sheet may also show the pin configurations with all pins labeled. If the pin configurations are not shown, there may be a schematic diagram showing pin functions. Some data sheets give both pin configurations and schematic diagrams, as shown in figure 1-34. This figure illustrates a manufacturer's data sheet with all of the pin functions shown.

Figure 1-32. - Some schematic symbols for ICs.

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Figure 1-33. - Manufacturer's Data Sheet.

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