July 1969 Radio-Electronics
[Table of Contents]
Wax nostalgic about and learn from the history of early electronics.
See articles from Radio-Electronics,
published 1930-1988. All copyrights hereby acknowledged.
Part 1 of this "All About IC's" series titled, "What Makes Them Tick," author Bob Hibberd introduced the concept of semiconductor physics and doped PN junctions. In Part 2, he discusses methods used to fabricate monolithic, integrated circuits (IC's) on silicon chips. Transistors, diodes, resistor, capacitors, and to some extent, inductors, can be built using a combination of variously doped junction regions, metallization, and oxidation (insulators). Technology has come a long way since 1969, including mask techniques, 3-D structures, doping gradients, feature size, dielectric breakdown strength, current leakage, circuit density, mixed analog, RF, and digital circuitry, and other things. Part 3, covered in the August issue, goes into more detail about how passive components are realized in silicon.
See Part 1, Part 2, Part 3, Part 4.
How to squeeze diodes, transistors, capacitors, resistors into thousandths of an inch - Part 2
by Bob Hibberd
Texas Instruments, Dallas, Texas
The transistor revolutionized electronics. It made possible smaller, lighter, more versatile, more reliable, less costly electronic gear which required less operating power. But the transistor was only a prelude to a much greater revolution - the monolithic integrated circuit. These devices perform complete circuit functions in a space the size of a single transistor. As a result IC's (integrated circuits) are becoming the basic component of electronic equipment. They are rapidly replacing assemblies of discrete transistors, diodes, resistors and capacitors.
In this article we will see how silicon monolithic integrated circuits are made. The method of forming the electronic circuit elements within a single silicon wafer and interconnecting them to give a complete electronic circuit is detailed.
Fig. 1 - A 1.5-inch silicon slice can contain 500 IC wafers. Within a 50-mil wafer, resistors and transistors need the most area. Typical component sizes are shown.
Fig. 2 - To make an IC, greatly enlarged drawings are photographically reduced to about 50-mil square. Separate masks are needed for each oxide removal step.
The terms "microelectronics" and "integrated circuits" are sometimes used interchangeably, but this is not correct. Microelectronics is a name for extremely small electronic components and circuit assemblies, made by thin-film, thick-film or semiconductor techniques. An integrated circuit (LC) is a special kind of microelectronics. It is a circuit that has been fabricated as an inseparable assembly of electronic elements in a single structure. It cannot be divided without destroying its intended electronic function. Thus, IC's come under the general category of microelectronics, but all microelectronic units are not necessarily IC's.
There are two basic approaches to modern microelectronics-monolithic integrated circuits and film circuits. In monolithic integrated circuits, all circuit elements, active and passive, are simultaneously formed in a single small wafer of silicon. The elements are interconnected by metallic stripes deposited onto the oxidized surface of the silicon wafer.
Film circuits are made by forming the passive electronic components and metallic interconnections on the surface of an insulation substrate. Then the active semiconductor devices are added usually in discrete wafer form. There are two types of film circuits, thin film and thick film.
In thin-film circuits the passive components and interconnection wiring are formed on glass or ceramic substrates, using evaporation techniques. The active components (transistors and diodes) are fabricated as separate semiconductor wafers and assembled into the circuit.
Thick-film circuits are prepared in a similar manner except that the passive components and wiring pattern are formed by silk-screen techniques on ceramic substrates.
Other integrated circuits are produced using a combination of techniques. In multichip circuits, the electronic components for a circuit are formed in two or more silicon wafers (chips). The chips are mounted side by side on a common header. Some interconnections are included on each chip and the circuit is completed by wiring the chips together with small-diameter gold wire.
Hybrid integrated circuits are combinations of monolithic and film techniques. Active components are formed in a wafer of silicon using the planar process, and the passive components and interconnection wiring pattern formed on the surface of the silicon oxide, which covers the wafer, using evaporation techniques.
The monolithic IC is often considered a single electronic component since it is made and installed as single entity. The circuit components, as they were called in discrete assemblies, are referred to as circuit elements of integrated circuits. From now on we use the word "element" for this purpose.
Monolithic IC technology is an extension of the diffused planar process. Active elements (transistors and diodes) and passive elements (resistors and capacitors) are formed in the silicon slice by diffusing impurities into selected regions to modify electrical characteristics, and where necessary to form pn junctions. The various elements are designed so all can be formed simultaneously by the same sequence of diffusions.
In practice, the details of the diffusion processes are decided by the requirements of the transistors. The geometry of the other elements is designed so desired values are obtained with the transistor diffusion schedules. All process operations are carried out on the top surface of the silicon slice and all element contact regions are formed on this same surface. They are interconnected to form the complete electronic circuit by evaporating a metallic wiring pattern atop the silicon oxide which covers the surface between the contact areas.
As with planar transistors, selective oxide removal, diffusion and metallization are carried out on whole silicon slices. On each slice, the same circuit pattern is repeated a large number of times. For example, with an IC wafer 50 mils square (1 mil equals 0.001 inch) a single slice of silicon. 1.5 inches in diameter, contains about 500 circuits. which are all processed at the same time (see Fig. 1).
Fig. 3 - PN junction formation as oxidized n-type layer (a) has areas opened (b), and p-type diffusion isolates n areas. Surface is re-oxidized (d).
Fig. 4 - Oxide isolation starts with etched channels between surface-oxidized elements (a & b); silicon deposit (c) is then lapped on inverted slice (d).
The general sequence of monolithic integrated circuit fabrication is shown in Fig. 2. The first step is the "breadboard" design of the electronic circuit using discrete components. The circuit is designed to perform the required function and to insure that the values of the circuit elements are compatible with the diffusion processes. Next, the circuit elements are designed dimensionally and the complete circuit laid out in a geometric pattern. This is usually done by drawing the layout about 500 times full size - a 50-mil square wafer is drawn about 2 feet square.
From this drawing, a series of related drawings are prepared, one for each of the oxide removal steps. Each drawing is reduced to actual size by a series of photographic processes. At the same time as the final reduction to life size, the pattern is repeated by indexing the photographic plate under the image in a "step and repeat" sequence.
For each oxide removal step, a "master" photographic mask is made. It contains a matrix of the circuit patterns in precise location over an area greater than the slices to be processed. Copies are made from the master, and are used to expose the photoresist selectively during the oxide removal steps.
To understand IC fabrication, we must know how each type of circuit element is formed. The elements used are the same as those in discrete circuits - transistors, diodes, resistors and capacitors. A requirement common to all elements in IC's is that each one must be electrically isolated from the main part of the silicon wafer so that unwanted coupling between elements is minimized. Then the only connections between the elements will be the metallized pattern on the surface.
Several isolation methods have been developed. The most common are diode isolation and oxide isolation. Diode isolation uses the very high resistance of a reverse-biased pn junction. In this process (Fig. 3), an n-type epitaxial layer is grown on a p-type substrate slice of silicon. The surface of the epitaxial layer is oxidized (Fig. 3-a) and the oxide selectively removed from everywhere but the regions in which the elements will be formed (Fig. 3-b).
A p-type diffusion is then carried out and the p-type regions formed extend down through the epitaxial layer and join up with the p-type substrate (Fig. 3-c). This leaves n-type regions, each separated from the substrate by a pn junction (Fig. 3-d). When the final IC is operated, the pn junctions are all biased in the reverse direction by connecting the p-type substrate to a potential more negative than any part of the circuit. Then each junction presents a very high resistance which isolates the element formed in the n-type region of the junction.
With oxide isolation, a layer of silicon oxide is formed around each element as in Fig. 4. On a slice of n-type single crystal silicon (Fig. 4-a) channels are etched in the surface between the locations planned for each element. Then the surface of the slice, including the channels, is oxidized to form a continuous layer of silicon oxide Fig. 4-b. Polycrystalline silicon is deposited on top of the oxide in an epitaxial reactor (Fig. 4-c). Finally the slice is inverted and the original silicon is lapped down so only the regions between the channels are left (Fig. 4-d). Each of these is a region of single crystal silicon isolated by the layer of silicon oxide and supported on the substrate of polycrystalline silicon.
A third system of isolation used for special applications is called beam lead isolation. The circuit elements are formed in a wafer of silicon in the regular manner. The interconnecting metallization is made thicker than usual. Then the silicon between each element is completely removed by etching from the back side. The etchant does not attack the metallization, so each element is completely separate and is supported from the top by the metallic connections. A thermo-setting plastic can be applied to fill the spaces between the elements for added mechanical support.
Forming an IC Transistor
The techniques for making bipolar transistors for integrated circuits are similar to those for discrete planar transistors. A typical arrangement using diode isolation is shown in Fig. 5-a. After the isolation process, boron is diffused in to form the p-type base region. Then phosphorus is diffused in to form the high-concentration n+-type emitter region. At the same time, another n+ region is diffused into the n-type collector region so a low-resistance contact to the collector region can be made.
There is one significant difference from the discrete planar transistor. The collector contact is made at the top surface, alongside the base and emitter contacts. This is a problem because collector current must flow laterally along the narrow n-type collector region to reach the contact. There is additional series-collector resistance compared with the discrete transistor, in which the collector contact is made to the bottom surface.
Fig. 5 - An IC transistor, showing basic structure (a), preferred structure (b) and the device's equivalent circuit (c).
Fig 6-a - A collector-base IC diode used in general-purpose circuits. b The faster-switching emitter-base diode.
To minimize this series resistance, a low-resistance n+-type region is selectively diffused into the substrate slice before the epitaxial growth of the n-type layer. This gives the structure in Fig. 5-b. Collector current can now flow straight down into the low-resistance n+ region and then sideways along it to the vicinity of the contact, resulting in a lower series-collector resistance (RCS). This arrangement is called D.U.F. (Diffusion Under the Epitaxial Film).
The equivalent circuit of the transistor, including the isolation junction, is shown in Fig. 5-c. The isolation junction has capacitance C1 in parallel and series resistance R1 due to the resistance of the substrate between the active transistor region and the substrate contact. At high frequencies and fast switching speeds, the effect of the isolation diode capacitance must be carefully evaluated, as it may be high enough to allow some stray coupling to the substrate and other elements of the circuit.
Because of its construction, the MOS (Metal Oxide Semiconductor) transistor is self-isolating. Both source and drain are isolated by their own pn junctions. The gate is isolated by the thin layer of silicon oxide. The channel formed under the gate is also isolated by a pn junction which forms with it. This means that MOS transistors can be fabricated in a smaller area than bipolar transistors, allowing a higher element density.
The MOS transistor can be used as a resistor between source and drain. Its value is dependent on the gate potential and the transconductance of the structure. Resistors with values compatible with switching circuits can be obtained by designing the MOS structure to have a low transconductance (wide source to drain spacing) and connecting the gate to the drain, so that the structure is biased on. Such resistors can be made in a much smaller area than that required for diffused resistors, allowing a further increase in element density. One disadvantage is that the MOS circuit has a considerably slower switching speed than the bipolar circuit.
Integrated Circuit Diodes
Integrated circuit diodes are prepared by forming pn junctions at the same time as one of the transistor junctions. A diode in which the cathode is the original n-type region and the p-type anode is formed during the transistor base diffusion is in Fig. 6-a. This diode has the same reverse-voltage capability as the transistor collector junction, and is widely used for general-purpose circuit applications.
Where fast switching speeds are required, emitter-base diodes are used (Fig. 6-b). The diode anode is formed at the same time as the transistor base, and the cathode with the emitter. This gives a low-voltage diode with fast response time. To avoid unwanted effects caused by transistor action this type diode is arranged so the anode contact shorts the p-type anode region to the n-type region in which the diode is formed.
In the August article of this series, we'll look at how other elements are formed in IC's. The upcoming section describes how resistor values are determined by p-type material dimensions and concentration. Also covered are Junction and MOS-type capacitors, IC testing and assembly processes.
Posted September 13, 2018