Module 13 - Introduction to Number Systems and Logic
Pages i - ix,
1-1 to 1-10,
1-11 to 1-20,
1-21 to 1-33,
1-31 to 1-40,
1-41 to 1-50,
1-51 to 1-60,
1-61 to 69,
2-1 to 2-10, 2-11 to 2-20,
2-21 to 2-30,
2-31 to 2-36,
3-1 to 3-10,
3-11 to 2-20,
3-21 to 3-30,
3-31 to 3-40,
3-41 to 3-46, Index
SPECIAL LOGIC CIRCUITS
Upon completion of this chapter, you should be able to do the following:
1. Recognize the
types of special logic circuits used in digital equipment.
2. Identify exclusive OR and
exclusive NOR circuits and interpret their respective Truth Tables.
3. Identify adder and
4. Identify the types of flip-flops used in digital equipment and their
5. Identify counters, registers, and clock circuits.
6. Describe the
elements that make up logic families - RTL, DTL, TTL, CMOS.
Figure 3-1 is a portion of a typical logic diagram. It is similar to the diagrams you will encounter as your
study of digital circuitry progresses.
Figure 3-1. - Typical logic diagram.
Look closely at the figure. You will see many familiar logic gates. You will also see several that you may not
Digital equipment must be capable of many more operations than those described in chapter 2. Provisions
must be made for accepting information; performing arithmetic or logic operations; and transferring, storing, and
outputting information. Timing circuits are included to ensure that all operations occur at the proper time.
In this chapter you will become acquainted with the logic circuits used to perform the operations mentioned above.
THE EXCLUSIVE OR GATE
The exclusive OR gate is a modified OR gate that produces a HIGH output when only one of the inputs is HIGH.
You will often see the abbreviation X-OR used to identify this gate. When both inputs are HIGH or when both inputs
are LOW, the output is LOW.
The standard symbol for an exclusive OR gate is shown in figure 3-2 along with
the associated Truth Table. The operation function sign for the exclusive OR gate is ⊕
Figure 3-2. - Exclusive OR gate and Truth Table.
If you were to observe the input and output signals of an X-OR gate, the results would be similar to those
shown in figure 3-3. At T0, both inputs are LOW and the output is LOW. At T1, A goes to HIGH
and remains HIGH until T2. During this time the output is HIGH. At T3, B goes HIGH and
remains HIGH through T5. At T4, A again goes HIGH and remains HIGH through T5.
Between T3and T4 , the output is HIGH. At T4, when both A and B are HIGH, the
output goes LOW.
Figure 3-3. - Exclusive OR gate timing diagram.
THE EXCLUSIVE NOR GATE
The exclusive NOR (X-NOR) gate is nothing more than an X-OR gate with an inverted output. It produces a HIGH
output when the inputs are either all HIGH or all LOW. The standard symbol and the Truth Table are shown in figure
3-4. The operation function sign is ⊕with a vinculum over the entire
Figure 3-4. - Exclusive NOR gate and Truth Table.
A timing diagram for the X-NOR gate is shown in figure 3-5. You can see that from T0 to T1,
when both inputs are LOW, the output is HIGH. The output goes LOW when the inputs are opposite; one HIGH and the
other LOW. At time T3, both inputs go HIGH causing the output to go HIGH.
Figure 3-5. - Exclusive NOR gate timing diagram.
Q1. What is the sign of operation for the X-OR gate?
Q2. What will be the
output of an X-OR gate when both inputs are HIGH?
Q3. A two-input X-OR gate will produce a
HIGH output when the inputs are at what logic levels?
Q4. What type of gate is represented by
the output Boolean expression
What will be the output of an X-NOR gate when both inputs are LOW?
Adders are combinations of logic gates that combine binary values to obtain a sum. They are classified
according to their ability to accept and combine the digits. In this section we will discuss quarter adders, half
adders, and full adders.
A quarter adder is a circuit that can add
two binary digits but will not produce a carry. This circuit will produce the following results:
0 plus 0 = 0
0 plus 1 = 1
1 plus 0 = 1
1 plus 1 = 0 (no carry)
You will notice that the output produced is the same as the output for the Truth Table of an X-OR.
Therefore, an X-OR gate can be used as a quarter adder.
The combination of gates in figure 3-6 will also
produce the desired results. When A and B are both
LOW (0), the output of each AND gate is LOW (0); therefore,
the output of the OR gate is LOW (0).
When A is HIGH and B is LOW, then B is
HIGH and AND gate 1 produces a HIGH output, resulting in a sum of 1 at gate 3. With A LOW and B HIGH, gate 2
output is HIGH, and the sum is 1. When both A and B are HIGH, neither AND gate has an output, and the output of
gate 3 is LOW (0); no carry is produced.
Figure 3-6. - Quarter adder.
A half adder is designed to combine two binary digits and produce a carry.
Figure 3-7 shows two ways of constructing a half adder. An AND gate is added in parallel to the quarter adder to
generate the carry. The SUM column of the Truth Table represents the output of the quarter adder, and the CARRY
column represents the output of the AND gate.
Figure 3-7. - Half adders and Truth Table.
We have seen that the output of the quarter adder is HIGH when either input, but not both, is HIGH. It
is only when both inputs are HIGH that the AND gate is activated and a carry is produced. The largest sum that can
be obtained from a half adder is 102 (12 plus 12).
The full adder becomes necessary when a carry input must be added to the two binary digits to obtain the correct
sum. A half adder has no input for carries from previous circuits.
One method of constructing a full adder
is to use two half adders and an OR gate as shown in figure 3-8. The inputs A and B are applied to gates 1 and 2.
These make up one half adder. The sum output of this half adder and the carry-from a previous circuit become the
inputs to the second half adder. The carry from each half adder is applied to gate 5 to produce the carry-out for
Figure 3-8. - Full adder and Truth Table.
Now let's add a series of numbers and see how the circuit operates.
First, let's add 1 and 0. When
either A or B is HIGH, gate 1 has an output. This output is applied to gates 3 and 4. Since the carry-in is 0,
only gate 3 will produce an output. The sum of 12 and 0 is 12.
Now let's add 12
and 12. If A and B are both HIGH, the output of gate 1 is LOW. When the carry-in is 0 (LOW), the output of gate 3
is LOW. Gate 2 produces an output that is applied to gate 5, which produces the carry-out. The sum of 12
and 12 is 102, just as it was for the half adder.
When A and B are both LOW and the
carry-in is 1, only gate 3 has an output and produces a sum of 12 with no carry-out.
Now, let's add
A or B and a carry-in. For example, let's assume that A is HIGH and B is LOW. With these conditions, gate 1 will
have an output. This output and the carry-in applied to gates 3 and 4 will produce a sum out of 0 and a carry of
1. This carry from gate 4 will cause gate 5 to produce a carry-out. The sum of A and a carry (12 plus 12)
When A, B, and the carry-in are all HIGH, a sum of 1 and a carry-out are produced. First, consider A
and B. When both are HIGH, the output of gate 1 is LOW, and the output of gate 2 is HIGH, giving us a carry-out at
gate 5. The carry-in produces a 1 output at gate 3, giving us a sum of 1. The output of the full adder is 112.
The sum of 12 plus 12 plus 12 is 112.
The adders discussed in the previous section have been limited to adding single-digit
binary numbers and carries. The largest sum that can be obtained using a full adder is 112.
Parallel adders let us add multiple-digit numbers. If we place full adders in parallel, we can add two- or
four-digit numbers or any other size desired.
Figure 3-9 uses STANDARD SYMBOLS to show a parallel adder
capable of adding two, two-digit binary numbers. In previous discussions we have depicted circuits with individual
logic gates shown. Standard symbols (blocks) allow us to analyze circuits with inputs and outputs only. One
standard symbol may actually contain many and various types of gates and circuits. The addend would be input on
the A inputs (A2
= MSD, A1 = LSD), and the augend input on the B inputs (B2 = MSD, B1 =
LSD). For this explanation we will assume there is no input to C0 (carry from a previous circuit).
Figure 3-9. - Parallel binary adder.
Now let's add some two-digit numbers. To add 102 (addend) and 012 (augend), assume there
are numbers at the appropriate inputs. The addend inputs will be 1 on A2 and 0 on A1. The
augend inputs will be 0 on B2 and 1 on B1. Working from right to left, as we do in normal
addition, let's calculate the outputs of each full adder.
With A1 at 0 and B1 at 1,
the output of adder 1 will be a sum (S1) of 1 with no carry (C1). Since A2 is 1
is 0, we have a sum (S2) of 1 with no carry (C2) from adder 1. To determine the sum, read
the outputs (C2, S2, and S1) from left to right. In this case, C2 = 0,
= 1, and S1 = 1. The sum, then, of 102 and 012 is 0112 or 112.
To add 112 and 012, assume one number is applied to A1 and A2,
and the other to B1 and B2, as
shown in figure 3-10. Adder 1 produces a sum (S1)
of 0 and a carry (C1) of 1. Adder 2 gives us a sum (S2)
of 0 and a carry (C2) of 1. By reading the outputs (C2, S2, and S1),
we see that the sum of 112 and 012 is 1002.
Figure 3-10. - Parallel addition.
As you know, the highest binary number with two digits is 112. Using the parallel adder, let's add
112 and 112.
First, apply the addend and augend to the A and B inputs.
Calculate the output of each full adder beginning with full adder 1. With A1 and B1 at
1, S1 is 0 and C1 is 1. Since all three inputs (A2, B2, and C1)
to full adder 2 are 1, the output will be 1 at S2 and 1 at C2. The output of the circuit, as
you read left to right, is 1102, the sum of 112 and 112.
may be expanded by combining more full adders to accommodate the number of digits in the numbers to be added.
There must be one full adder for each digit.
Q6. What advantage does a half adder have
over a quarter adder?
Q7. An X-OR gate may be used as what type of adder?
What will be the output of a half adder when both inputs are 1s?
Q9. What type of adder
is used to handle a carry from a previous circuit?
Q10. How many full adders are required to
add four-digit numbers?
Q11. With the inputs shown below, what will be the output of S1,
S2, and C2?
Q12. What is the output of C1?
accomplished in computers by the R's complement and add method. This is the same method you used in chapter 1 to
subtract binary numbers.
R's complement subtraction allows us to use fewer circuits than would be required
for separate add and subtract functions. Adding X-OR gates to full adders, as shown in figure 3-11, enables the
circuit to perform R's complement subtraction as well as addition.
Figure 3-11. - R's complement adder/subtracter.
To add two numbers using this circuit, the addend and augend are applied to the A and B inputs. The B inputs
are applied to one input of the X-OR gates. A control signal is applied to the other input of the X-OR gates. When
the control signal is LOW, the circuit will add; and when it is HIGH, the circuit will subtract.
add mode, the outputs of the X-OR gates will be the same as the B inputs. Addition takes place in the same manner
as described in parallel addition.
Before we attempt to show subtraction, let's review R's complement
subtraction. To subtract 102 from 112, write down the minuend (112). Perform the
R's complement on the subtrahend. Now add the minuend and the complemented subtrahend.
Disregard the most significant 1, and the difference between 112 and 102
is 012. The most significant 1 will not be used in the example shown in the following paragraph.
NEETS Table of Contents
- Introduction to Matter, Energy,
and Direct Current
- Introduction to Alternating Current and Transformers
- Introduction to Circuit Protection,
Control, and Measurement
- Introduction to Electrical Conductors, Wiring
Techniques, and Schematic Reading
- Introduction to Generators and Motors
- Introduction to Electronic Emission, Tubes,
and Power Supplies
- Introduction to Solid-State Devices and
- Introduction to Amplifiers
- Introduction to Wave-Generation and Wave-Shaping
- Introduction to Wave Propagation, Transmission
Lines, and Antennas
- Microwave Principles
- Modulation Principles
- Introduction to Number Systems and Logic Circuits
- Introduction to Microelectronics
- Principles of Synchros, Servos, and Gyros
- Introduction to Test Equipment
- Radio-Frequency Communications Principles
- Radar Principles
- The Technician's Handbook, Master Glossary
- Test Methods and Practices
- Introduction to Digital Computers
- Magnetic Recording
- Introduction to Fiber Optics