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Header Region - RF Cafe Sub-Header - RF Cafe # Module 13 - Introduction to Number Systems and LogicNavy Electricity and Electronics Training Series (NEETS)Chapter 2:  Pages 2-11 through 2-20

Module 13 - Introduction to Number Systems and Logic

also goes HIGH and remains HIGH until both inputs are again LOW. At T5, both X and Y go HIGH causing f to go HIGH. Figure 2-8. - OR gate input and output signals.

TRUTH TABLE

Using the inputs X and Y, let's construct a Truth Table for the OR gate. You can see from the discussion of figure 2-8 that there are four combinations of inputs. List each of these combinations of inputs and the respective outputs and you have the Truth Table for the OR gate. When writing or stating the Boolean expression for an OR gate with more than two inputs, simply place the OR sign (+) between each input and read or state the sign as OR. For example, the Boolean expression for an OR gate with the inputs of A, B, C, and D would be:

f = A+B+C+D

This expression is spoken "f equals A OR B OR C OR D."

You can substitute the complements for the original statements as we did with the AND gate or use negative logic; but for an output from an OR gate, at least one of the inputs must be TRUE.

2-11

Q10.   Write the Boolean expression for an OR gate having G, K, and L as inputs.

Q11.   How many input combinations are possible using G, K, and L?

Q12.   How many of those combinations will produce a HIGH output?

THE INVERTER

The INVERTER, often referred to as a NOT gate, is a logic device that has an output opposite of the input. It is sometimes called a NEGATOR. It may be used alone or in combination with other logic devices to fulfill equipment requirements.

When an inverter is used alone, it is represented by the symbol shown in figure 2-9 (view A). It will more often be seen in conjunction with the symbol for an amplifier (view B). Symbols for inverters used in combination with other devices will be shown later in the chapter. Figure 2-9. - Inverter: A. Symbol for inverter used alone; B. Symbol for an amplifier/inverter.

Let's go back to the statement "Today is payday." We stated that P represents the TRUE state. If we apply P to the input of the inverter as shown in figure 2-10, then the output will be the opposite of the input. The output, in this case, is P . At times T0  through T2, P is LOW. Consequently, the output ( P ) is HIGH. At T2, P goes HIGH and as a result P goes LOW. P remains LOW as long as P is HIGH and vice versa. The Boolean expression for the output of this gate is f = P.

2-12 Figure 2-10. - Inverter input and resultant output.

You will recall that P is the complement of P. The Truth Table for an inverter is shown below. The output of an inverter will be the complement of the input. The following examples show various inputs to inverters and the resulting outputs: The vinculum, or NOT sign, is placed over the entire output or removed from the output, depending on the input.  If we applied A B C to an inverter, the output would be . And if we ran that output through another inverter, the output would be A B C

2-13

Q13.   What is the complement of XYZ?

Q14.   The input to an inverter is .  What is the output

Q15.   In a properly functioning circuit, can both the input and output of an inverter be HIGH at the same time?

THE NAND GATE

The NAND gate is another logic device commonly found in digital equipment. This gate is simply an AND gate with an inverter (NOT gate) at the output.

LOGIC SYMBOL

The logic symbol for the NAND gate is shown in figure 2-11. Figure 2-11. - NAND gate.

The NAND gate can have two or more inputs. The output will be LOW only when all the inputs are HIGH. Conversely, the output will be HIGH when any or all of the inputs are LOW.

The NAND gate performs two functions, AND and NOT. Separating the NAND symbol to show these two functions would reveal the equivalent circuits depicted in figure 2-12. This should help you better understand how the NAND gate functions. Figure 2-12. - NAND gate equivalent circuit: A. Either X or Y or both are LOW; B. Both X and Y are HIGH.

2-14

Inputs X and Y are applied to the AND gate. If either X or Y or both are LOW (view A), then the output of the AND gate is LOW. A LOW (logic 0) on the input of the inverter results in a HIGH (logic 1) output. When both X and Y are HIGH (view B), the output of the AND gate is HIGH; thus the output of the inverter is LOW. The Boolean expression for the output of a NAND gate with these inputs is f = XY . The expression is spoken "X AND Y quantity NOT." The output of any NAND gate is the negation of the input. For example, if our inputs are X and Y , the output will be .

NAND GATE OPERATION

Now, let's observe the logic level inputs and corresponding outputs as shown in figure 2-13. At time T0, X and Y are both LOW. The output is HIGH; the opposite of an AND gate with the same inputs. At T1, X goes HIGH and Y remains LOW. As a result, the output remains HIGH. At T2, X goes LOW and Y
goes HIGH. Again, the output remains HIGH. When both X and Y are HIGH at T4, the output goes LOW. The output will remain LOW only as long as both X and Y are HIGH. Figure 2-13. - NAND gate input and output signals.

TRUTH TABLE

The Truth Table for a NAND gate with X and Y as inputs is shown below. Q16.   A NAND gate has Z and X as inputs. What will be the output logic level if Z is HIGH and X is LOW?

Q17.   What must be the state of the inputs to a NAND gate in order to produce a LOW output?

2-15

Q18.   What is the output Boolean expression for a NAND gate with inputs A, B , and C?

Q19.   A NAND gate has inputs labeled as A, B , and C. If A and B  are HIGH, C must be at what logic level to produce a HIGH output?

THE NOR GATE

As you might expect, the NOR gate is an OR gate with an inverter on the output.

LOGIC SYMBOL

The standard logic symbol for this gate is shown in figure 2-14. More than just the two inputs may be shown. Figure 2-14. - NOR gate.

The NOR gate will have a HIGH output only when all the inputs are LOW.

When broken down, the two functions performed by the NOR gate can be represented by the equivalent circuit depicted in figure 2-15. When both inputs to the OR gate are LOW, the output is LOW. A LOW applied to an inverter gives a HIGH output. If either or both of the inputs to the OR gate are HIGH, the output will be HIGH. When this HIGH output is applied to the inverter, the resulting output is LOW. The Boolean expression for the output of this NOR gate is f = K + L . The expression is spoken, "K OR L quantity NOT." Figure 2-15. - NOR gate equivalent circuit.

NOR GATE OPERATION

The logic level inputs and corresponding outputs for a NOR gate are shown in figure 2-16. At time T0, both K and L are LOW; as a result, f is HIGH. At T1, K goes HIGH, L remains LOW, and f goes LOW. At T2, K goes LOW, L goes HIGH, and the output remains LOW. The output goes HIGH again at T3 when both inputs are LOW. At T4 when both inputs are HIGH, the output goes LOW and remains LOW until T5 when both inputs go LOW. Remember the output is just opposite of what it would be for an
OR gate.

2-16 Figure 2-16. - NOR gate input and output signals.

TRUTH TABLE

The Truth Table for a NOR gate with K and L as inputs is shown below. Q20.   How does a NOR gate differ from an OR gate?

Q21.   What will be the output of a NOR gate when both inputs are HIGH?

Q22.   What is the output Boolean expression for a NOR gate with R and T as inputs?

Q23.   In what state must the inputs to a NOR gate be in order to produce a logic 1 output?

VARIATIONS OF FUNDAMENTAL GATES

Now that you are familiar with fundamental logic gates, let's look at some variations of these gates that you may encounter.

2-17

Up to now you have seen inverters used alone or on the output of AND and OR gates. Inverters may also be used on one or more of the inputs to the logic gates. Take a look at the examples as discussed in the following paragraphs.

AND/NAND GATE VARIATIONS

If we place an inverter on one input of a two-input AND gate, the output will be quite different from that of the standard AND gate.

In figure 2-17, we have placed an inverter on the A input. When A is HIGH, the inverter makes it a LOW going into the AND gate. In order for the output to be HIGH, A would have to be LOW while B is HIGH, as shown in the Truth Table. If the inverter were on the B input, the output expression would then be f = A B. Figure 2-17. - AND gate with one inverted input.

Now let's compare a NAND gate to an AND gate with an inverter on each input. Figure 2-18 shows these gates and the associated Truth Tables. With the NAND gate (view A), the output is HIGH when either or both inputs is/are LOW. The AND gate with inverters on each input (view B), produces a HIGH output only when both inputs are LOW. This comparison also points out the differences between the expressions f = A B (A AND B quantity NOT) and f = A   B  (NOT A AND NOT B).

Now, look over the Truth Tables for figures 2-17, 2-18, and 2-19; look at how the outputs vary with inverters in different positions.

2-18 Figure 2-18. - Comparison of NAND gate and AND gate with inverted inputs: A. NAND gate; B. AND gate with inverters on each input. Figure 2-19. - NAND gate with one inverted input.

OR/NOR GATE VARIATIONS

The outputs of OR and NOR gates may also be changed with the use of inverters.

An OR gate with one input inverted is shown in figure 2-20. The output of this OR gate requires that A be LOW, B be HIGH, or both of these conditions existing at the same time in order to have a HIGH output. Since the A input is inverted, it must be LOW if B is LOW in order to produce a HIGH output. Therefore the output is f = A +B.

2-19 Figure 2-20. - OR gate with one inverted input.

Figure 2-21compares a NOR gate (view A), to an OR gate with inverters on both inputs (view B), and shows the respective Truth Tables. The NOR gate will produce a HIGH output only when both inputs are LOW. The OR gate with inverted inputs produces a HIGH output with all input combinations EXCEPT when both inputs are HIGH. This figure also illustrates the differences between the expressions f =  A + B (A OR B quantity NOT) and f =  A  +  B  (NOT A OR NOT B). Figure 2-21. - Comparison of NOR gate and OR gate with inverted inputs: A. NOR gate; B. OR gate with inverters on both inputs.

As with the NAND gate, one or more inputs to NOR gates may be inverted. Figure 2-22 shows the result of inverting a NOR gate input. In this case, because of the inversion of the B input and the inversion of the output, the only time this gate will produce a HIGH output is when A is LOW and B is HIGH. The output Boolean expression for this gate is f = , spoken "A OR NOT B quantity NOT."

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NEETS Table of Contents

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